公开(公告)号：US09634039B2

公开(公告)日：2017-04-25

申请号：US15202070

申请日：2016-07-05

申请人： Applied Materials, Inc.

发明人： Soo Young Choi ,  Tae Kyung Won ,  Dong-Kil Yim ,  Yi Cui ,  Xuena Zhang

IPC分类号： H01L51/52 ,  H01L27/12 ,  H01L27/32

CPC分类号： H01L27/1248 ,  H01L27/3262

摘要： Embodiments of the present disclosure generally relate to methods and devices for use of low temperature polysilicon (LTPS) thin film transistors in liquid crystal display (LCD) and organic light-emitting diode (OLED) displays.

公开(公告)号：US10224432B2

公开(公告)日：2019-03-05

申请号：US15456418

申请日：2017-03-10

申请人： Applied Materials, Inc.

发明人： Rodney Shunleong Lim ,  Dong-Kil Yim

IPC分类号： H01L29/78 ,  H01L29/786 ,  H01L21/223 ,  H01L21/423 ,  H01L29/20 ,  H01L29/207 ,  H01L29/24 ,  H01L29/49 ,  H01L29/66

摘要： Embodiments of the disclosure generally provide methods of forming thin film transistor (TFT) device structure with good interface management between active layers of a metal electrode layer and/or source/drain electrode layers and a nearby insulating material so as to provide high electrical performance devices, or for other suitable display applications. In one embodiment, a thin film transistor structure includes a contact region formed between fluorine-doped source and drain regions disposed on a substrate, a gate insulating layer disposed on the contact region, and a metal electrode layer disposed on the gate insulator layer.

公开(公告)号：US12076763B2

公开(公告)日：2024-09-03

申请号：US16007876

申请日：2018-06-13

申请人： Applied Materials, Inc.

发明人： Yujia Zhai ,  Lai Zhao ,  Xiangxin Rui ,  Dong-Kil Yim ,  Tae Kyung Won ,  Soo Young Choi

IPC分类号： B08B7/00 ,  B08B9/00 ,  C23C16/44 ,  H01J37/32 ,  H01L21/02 ,  H01L21/687 ,  H01L27/12 ,  H01L29/49 ,  H01L49/02

CPC分类号： B08B7/0035 ,  B08B9/00 ,  C23C16/4405 ,  H01J37/32082 ,  H01L27/1255 ,  H01L29/4908 ,  H01J2237/335 ,  H01L21/02181 ,  H01L21/02189 ,  H01L21/68742 ,  H01L28/40

摘要： In one implementation, a method for cleaning a processing chamber is provided. The method comprises introducing a reactive species into a processing chamber having a residual high-k dielectric material formed on one or more interior surfaces of the processing chamber. The reactive species is formed from a halogen-containing gas mixture and the one or more interior surfaces include at least one surface having a coating material formed thereon. The method further comprises reacting the residual high-k dielectric material with the reactive species to form a volatile product. The method further comprises removing the volatile product from the processing chamber. The removal rate of the residual high-k dielectric material is greater than a removal rate of the coating material. The high-k dielectric material is selected from zirconium dioxide (ZrO2) and hafnium dioxide (HfO2). The coating material includes a compound selected from alumina (Al2O3), yttrium-containing compounds, and combinations thereof.

公开(公告)号：US10854737B2

公开(公告)日：2020-12-01

申请号：US15874081

申请日：2018-01-18

申请人： Applied Materials, Inc.

发明人： Soo Young Choi ,  Beom Soo Park ,  Yi Cui ,  Tae Kyung Won ,  Dong-Kil Yim

IPC分类号： H01L23/31 ,  H01L21/02 ,  H01L29/66 ,  H01L29/786

摘要： Techniques are disclosed for methods of post-treating an etch stop or a passivation layer in a thin film transistor to increase the stability behavior of the thin film transistor.

公开(公告)号：US10134878B2

公开(公告)日：2018-11-20

申请号：US15359325

申请日：2016-11-22

申请人： Applied Materials, Inc.

发明人： Hao-Chien Hsu ,  Dong-Kil Yim ,  Tae Kyung Won ,  Xuena Zhang ,  Won Ho Sung ,  Rodney Shunleong Lim

IPC分类号： H01L29/786 ,  H01L29/66 ,  H01L21/02

摘要： Embodiments of the present disclosure generally relate to methods for forming a TFT having a metal oxide layer. The method may include forming a metal oxide layer and treating the metal oxide layer with a fluorine containing gas or plasma. The fluorine treatment of the metal oxide layer helps fill the oxygen vacancies in the metal oxide channel layer, leading to a more stable TFT and preventing a negative threshold voltage in the TFT.

公开(公告)号：US11101338B2

公开(公告)日：2021-08-24

申请号：US16243314

申请日：2019-01-09

申请人： Applied Materials, Inc.

发明人： Jung Bae Kim ,  Dong-Kil Yim ,  Soo Young Choi ,  Lai Zhao

IPC分类号： H01L27/32 ,  H01L27/12 ,  G09G3/3233

摘要： Disclosed herein is a sub-pixel circuit for a display device. The sub-pixel circuit has a driving TFT and at least one switching TFT. The at least one switching TFT is an oxide TFT. The sub-pixel circuit additionally has at least one storage capacitor wherein the storage capacitor has a capacitance between about 1 fF and about 55 fF.

公开(公告)号：US09935183B2

公开(公告)日：2018-04-03

申请号：US15412545

申请日：2017-01-23

申请人： Applied Materials, Inc.

发明人： Dong-Kil Yim ,  Tae Kyung Won ,  Seon-Mee Cho ,  John M. White

IPC分类号： H01L29/10 ,  H01L29/66 ,  H01L29/786 ,  H01L29/24 ,  H01L21/467

CPC分类号： H01L29/66969 ,  H01L21/467 ,  H01L29/24 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/7869

摘要： The present invention generally relates to TFTs and methods for fabricating TFTs. For either back channel etch TFTs or for etch stop TFTs, multiple layers for the passivation layer or the etch stop layers permits a very dense capping layer to be formed over a less dense back channel protection layer. The capping layer can be sufficiently dense so that few pin holes are present and thus, hydrogen may not pass through to the semiconductor layer. As such, hydrogen containing precursors may be used for the capping layer deposition.

公开(公告)号：US09871124B2

公开(公告)日：2018-01-16

申请号：US15412519

申请日：2017-01-23

申请人： Applied Materials, Inc.

发明人： Jrjyan Jerry Chen ,  Soo Young Choi ,  Dong-Kil Yim ,  Yan Ye

IPC分类号： H01L29/66 ,  H01L21/02 ,  H01L29/786

CPC分类号： H01L29/66969 ,  H01L21/02565 ,  H01L29/78606 ,  H01L29/7869

摘要： The present invention generally relates to a method of manufacturing a TFT. The TFT has an active channel that comprises IGZO or zinc oxide. After the source and drain electrodes are formed, but before the passivation layers or etch stop layers are deposited thereover, the active channel is exposed to an N2O or O2 plasma. The interface between the active channel and the passivation layers or etch stop layers are either altered or damaged during formation of the source and drain electrodes. The N2O or O2 plasma alters and repairs the interface between the active channel and the passivation or etch stop layers.

公开(公告)号：US09245809B2

公开(公告)日：2016-01-26

申请号：US14199318

申请日：2014-03-06

申请人： Applied Materials, Inc.

发明人： Dong-Kil Yim ,  Tae Kyung Won ,  Seon-Mee Cho

IPC分类号： H01L21/66

CPC分类号： H01L22/12 ,  H01L22/24

摘要： The present invention generally relates to methods measuring pinhole determination. In one aspect, a method of measuring pinholes in a stack, such as a TFT stack, is provided. The method can include forming an active layer on a deposition surface of a substrate, forming a dielectric layer over the active layer, delivering an etchant to at least the dielectric layer, to etch both the dielectric layer and any pinholes formed therein and optically measuring the pinhole density of the etched dielectric layer using the active layer.

摘要翻译： 本发明一般涉及测量针孔确定的方法。 一方面，提供了一种测量堆叠中的针孔的方法，例如TFT堆叠。 该方法可以包括在衬底的沉积表面上形成有源层，在有源层上形成电介质层，向至少介电层递送蚀刻剂，以蚀刻电介质层和在其中形成的任何针孔，并光学测量 使用有源层的蚀刻介电层的针孔密度。

公开(公告)号：US10381454B2

公开(公告)日：2019-08-13

申请号：US15411724

申请日：2017-01-20

申请人： Applied Materials, Inc.

发明人： Xuena Zhang ,  Dong-Kil Yim ,  Wenqing Dai ,  Harvey You ,  Tae Kyung Won ,  Hsiao-Lin Yang ,  Wan-Yu Lin ,  Yun-chu Tsai

IPC分类号： H01L21/02 ,  H01L27/12 ,  H01L27/32 ,  H01L29/49 ,  H01L49/02 ,  G02F1/1362 ,  G02F1/1368

摘要： Embodiments of the disclosure generally provide methods of forming a capacitor with high capacitance and low leakage as well as a good interface control for thin film transistor (TFT) applications. In one embodiment, a thin film transistor structure includes a capacitor formed in a thin film transistor device. The capacitor further includes a common electrode disposed on a substrate, a dielectric layer formed on the common electrode and a pixel electrode formed on the dielectric layer. An interface protection layer formed between the common electrode and the dielectric layer, or between the dielectric layer and the pixel electrode. A gate insulating layer fabricated by a high-k material may also be utilized in the thin film transistor structure.