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公开(公告)号：US12072813B2
公开(公告)日：2024-08-27
申请号：US18047784
申请日：2022-10-19
发明人： Qunyi Yang , Peng Shen , Fan Yang
IPC分类号： G06F12/10 , G06F9/48 , G06F12/1081
CPC分类号： G06F12/1081 , G06F9/4812
摘要： A method for remapping a virtual address to a physical address is provided. The method is used in an address remapping unit and includes: receiving, by a remapping processing unit of the address remapping unit, a remapping request, decoding the remapping request and determining whether the remapping request has a direct memory access (DMA) remapping request; and executing, by the remapping processing unit, a remapping procedure: translating a virtual address corresponding to the remapping request to a physical address, when the remapping request has the DMA remapping request.
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公开(公告)号：US12038839B2
公开(公告)日：2024-07-16
申请号：US18314199
申请日：2023-05-09
发明人： Weilin Wang , Yingbing Guan , Yue Qin
IPC分类号： G06F12/0811 , G06F12/084 , G06F12/0891
CPC分类号： G06F12/0811 , G06F12/084 , G06F12/0891
摘要： A processor and a method for designating a demotion target to demote the demotion target from an in-core cache structure to an out-of-core cache structure is shown. In response to a cache data demotion instruction supported by an instruction set architecture, a first core of a processor operates a decoder to decode the cache data demotion instruction into microinstructions. According to the microinstructions, a demotion target designation request is transferred to a last-level cache (LLC) through a memory order buffer to drive the LLC to query an out-of-core cache table. According to the demotion target's cache status in the first core obtained from the out-of-core cache table, the LLC outputs a snoop request to the first core to snoop on the demotion target and demote the demotion target from the in-core cache structure of the first core to the LLC.
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公开(公告)号：US20240143851A1
公开(公告)日：2024-05-02
申请号：US18189381
申请日：2023-03-24
发明人： Zhenhua HUANG , Yingbing GUAN , Yanting LI
摘要： A trusted computing technology is shown. An isolated memory stores a security interrupt descriptor table (SIDT) to correspond to security interrupts triggered by security peripherals. A first register of the trusted core stores a first address pointing to the SIDT. A local advanced programmable interrupt controller in the trusted core provides an interrupt arbiter that arbitrates between peripheral interrupts received from the chipset. When producing an arbitration result showing that a target interrupt is a security interrupt, the interrupt arbiter outputs a security interrupt request and a security interrupt vector to trigger the trusted core to search the SIDT indicated by the first register, to get a target security interrupt descriptor for execution of the corresponding interrupt program.
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公开(公告)号：US11803381B2
公开(公告)日：2023-10-31
申请号：US17471167
申请日：2021-09-10
发明人： Weilin Wang , Yingbing Guan , Mengchen Yang
CPC分类号： G06F9/30145 , G06F9/3017 , G06F9/30047 , G06F9/30101 , G06F9/30174 , G06F9/30185 , G06F9/30189 , G06F9/3814 , G06F9/3857 , G06F9/455 , G06F9/45516 , G06F9/4812 , G06F11/0772
摘要： An instruction simulation device and a method thereof are provided. The simulation device includes a monitor, which is configured to determine whether a ready-for-execution instruction is an instruction under a new/extended instruction set sharing the same instruction set architecture as that of the processor. If the ready-for-execution instruction is an extended instruction, it is converted into a simulation program which consists of a compatible instruction sequence further composed of at least one native instruction of the processor or a compatible instruction recognizable/executable by the processor. An execution result of the extended instruction is simulated by executing the simulation program, thereby extending the service life of an electronic appliance embodied with the disclosed simulation device therein.
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公开(公告)号：US11789736B2
公开(公告)日：2023-10-17
申请号：US17471454
申请日：2021-09-10
发明人： Weilin Wang , Mengchen Yang , Yingbing Guan
CPC分类号： G06F9/30145 , G06F9/30047 , G06F9/4552 , G06F21/572
摘要： A method for executing new instructions is provided. The method is used in a processor and includes: receiving an instruction; generating an unknown instruction exception when the received instruction is an unknown instruction; in response to the unknown instruction exception, executing the following steps through a conversion program: determining whether the received instruction is a new instruction; and converting the received instruction into at least one old instruction when the received instruction is a new instruction; and executing the at least one old instruction in the same execution mode as the received instruction.
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公开(公告)号：US11733760B2
公开(公告)日：2023-08-22
申请号：US17527292
申请日：2021-11-16
发明人： Weilin Wang , Yingbing Guan , Long Cheng
IPC分类号： G06F1/3228 , G06F1/329
CPC分类号： G06F1/3228 , G06F1/329
摘要： A method of an electronic device for controlling power consumption includes the following steps. A busy-waiting command is received, wherein the busy-waiting command indicates that the operating system of a processing device is in a busy-waiting state. The microcode of the busy-waiting command is obtained according to the busy-waiting command. A waiting enabling command is generated and a counting value corresponding to the waiting enabling command is obtained according to the microcode. According to the waiting enabling command, the subsequent microcode is stopped sending to the processing device, so that the processing device enters an idle state, and the counter is enabled to start counting according to the counting value.
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公开(公告)号：US11675729B2
公开(公告)日：2023-06-13
申请号：US17506144
申请日：2021-10-20
发明人： Yixing Mei , Yongfeng Song , Xuemin Zhang , Xiaoliang Ji , Shuai Zhang
IPC分类号： G06F13/42 , H04L45/02 , H04L45/00 , H04L45/745 , H04L45/42 , G06F15/78 , G06F13/40 , H04L1/00 , H04L69/324 , G06F1/3234 , G06F9/4401 , G06F9/48 , G06F13/16
CPC分类号： G06F13/4265 , G06F1/3234 , G06F9/4418 , G06F9/4812 , G06F13/1668 , G06F13/4027 , G06F13/4068 , G06F15/7807 , G06F15/7825 , H04L1/004 , H04L45/02 , H04L45/22 , H04L45/42 , H04L45/745 , H04L69/324 , G06F13/4208 , G06F13/4282
摘要： An operation method of a sleep mode of an electronic device includes the following steps. A first sub-module of a first module sends a sleep command to a second sub-module of the first module and a third sub-module and a fourth sub-module of a second module, wherein the first sub-module includes first and second modes, the second sub-module includes third and fourth nodes, the third sub-module includes fifth and sixth nodes, and the fourth sub-module includes seventh and eighth nodes. The second sub-module, the third sub-module and fourth sub-module execute a sleep sequence in sequence to enter a sleep mode according to the sleep command. The first node sends the sleep command to the second node to execute the sleep sequence to enter the sleep mode. The first node sends the sleep command to the first node to execute the sleep sequence to enter the sleep mode.
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公开(公告)号：US20230141802A1
公开(公告)日：2023-05-11
申请号：US17721560
申请日：2022-04-15
发明人： Chunhui ZHENG , Jiao LI
CPC分类号： G06F11/27 , G06F13/4068
摘要： A method for built-in self-test, including the following operations: at a transmitting part, selecting a gold pattern, generating a test pattern using the gold pattern and a header corresponding to the gold pattern, and transmitting the test pattern to a receiving part via a tested path; and at a receiving part, parsing the header and a received pattern from the test pattern received, obtaining the gold pattern corresponding to the header based on the header parsed, and obtaining a test result of the tested path by comparing the gold pattern to the received pattern.
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公开(公告)号：US20230136539A1
公开(公告)日：2023-05-04
申请号：US17976860
申请日：2022-10-30
发明人： Jingyang Wang , Guangyun Wang , Zhiqiang Hui
IPC分类号： G06F13/362 , G06F13/16
摘要： A bridging module, a data transmission system, and a data transmission method are provided. The bridging module obtains a first read request, and allocates a first location storage space for first return data corresponding to the first read request. The bridging module combines a first master transaction identifier and an address of the first location storage space as a first slave transaction identifier of the first read request, and sends the first read request to a slave device. The bridging module obtains a second read request, and allocates a second location storage space for second return data corresponding to the second read request. The bridging module combines a second master transaction identifier and an address of the second location storage space as a second slave transaction identifier of the second read request, and sends the second read request to the slave device.
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公开(公告)号：US20230127938A1
公开(公告)日：2023-04-27
申请号：US18047795
申请日：2022-10-19
发明人： Qunyi YANG , Tingli CUI , Xinglin GUI
IPC分类号： G06F12/0879 , G06F12/1045
摘要： A method and a device for rapidly searching a cache are provided. The method for rapidly searching a cache includes: translating a source identifier (SID) to a domain identifier (DID) according to an extended flag from the software by searching a context cache, wherein the extended flag indicates that a current context entry stored in the context cache is a normal context entry or an extended context entry.
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