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公开(公告)号:US20250069988A1
公开(公告)日:2025-02-27
申请号:US18710115
申请日:2022-10-11
Applicant: Hitachi Energy Ltd
Inventor: Fabian FISCHER , Lluis SANTOLARIA
IPC: H01L23/473 , H01L21/48
Abstract: Cooler unit, semiconductor device and method for manufacturing a cooler unit. The cooler unit for liquid cooling of a power module comprises at least one insert that includes an upper part and a lower part and that is configured to be coupled to the power module with the upper part. The cooler unit further comprises a housing that limits a flow channel for a coolant and that comprises at least one recess which penetrates a wall of the housing up to the flow channel and which is configured in coordination with the at least one insert geometrically, wherein the at least one insert comprises copper and is arranged inside the recess and laser welded to the housing such that during operation the coolant flows through the flow channel and around the lower part of the at least one insert.
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公开(公告)号:US20250054836A1
公开(公告)日:2025-02-13
申请号:US18719794
申请日:2022-12-01
Applicant: Hitachi Energy Ltd
Inventor: Lluis SANTOLARIA , Milad MALEKI
IPC: H01L23/46 , F28F13/06 , H01L25/065
Abstract: A flow inverter (1) for a coolant substance (18) for a power semiconductor component (16) is specified, comprising—a first plate (2) extending along a main extension plane of the flow inverter (1), —a second plate (3) extending along the main extension plane, —a first wall (4) provided on the first plate (2) and the second plate (3) from a first main side of the flow inverter (1), and—a second wall (5) provided on the first plate (2) and the second plate (3) from a second main side of the flow inverter (1) opposite the first main side, wherein—the first plate (2) is provided next to the second plate (3), —at least one first recess (6) is provided between the first plate (2) and the second plate (3), and—at least one second recess (7) is provided between the first plate (2) and the second plate (3). Further, a power semiconductor component (16) is specified.
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公开(公告)号:US20250054689A1
公开(公告)日:2025-02-13
申请号:US18720730
申请日:2022-12-02
Applicant: Hitachi Energy Ltd
Inventor: Gianluca Bustreo , Valentina Valori , Paolo Pavanello , Lorenzo Luis Prieto Colmenero
Abstract: According to an embodiment, the spacer element for a winding of an electric device includes at least one connection member and a plurality of ribs. The ribs are connected to the connection member and are spaced from each other pairwise. The spacer element is arrangeable between two successive winding units of the winding during manufacturing of the winding. Each two adjacent ribs delimit a flow channel for a cooling fluid, said flow channel extends between and along the two adjacent ribs.
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公开(公告)号:US12217922B2
公开(公告)日:2025-02-04
申请号:US17802115
申请日:2020-02-24
Applicant: Hitachi Energy Ltd
Inventor: Lukasz Bachorz , Timothy John Heemskerk
IPC: H01H33/668 , G01R31/327
Abstract: Embodiments relate to a method for monitoring the vacuum interrupter's condition of an electric device. The method comprises receiving a first voltage signal indicating a first voltage at a first contact of a switch inside the electric device. The first contact of the switch is coupled to a source line. The method further comprises receiving a second voltage signal indicating a second voltage at a second contact of the switch. The second contact of the switch is coupled to a reactive component. The method comprises receiving a current signal indicating a current at the second contact of the switch. The method comprises determining occurrence of a restrike in response to determining increasing amplitudes of the first voltage signal, the second voltage signal and the current signal in a time slot. The method further comprises determining the vacuum interrupter condition based on the determined occurrence of the restrike.
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公开(公告)号:US12212165B2
公开(公告)日:2025-01-28
申请号:US18700636
申请日:2021-10-13
Applicant: Hitachi Energy Ltd
Inventor: Per Karreby , Jean-Philippe Hasler , Mikael Tenerz , Mohsen Asoodar , Lexuan Meng
IPC: H02J7/00
Abstract: An arrangement is disclosed, comprising a series connection of a plurality of energy storage units, a plurality of bypass circuits, each bypass circuit being configured to bypass a respective one of the energy storage units in the series connection, and a plurality of control modules, wherein each control module corresponds to a respective one of the bypass circuits. Each control module is configured to control operation of the corresponding bypass circuit and at least one other bypass circuit of the plurality of bypass circuits to selectively bypass the corresponding energy storage units in the series connection in such a way that operation of each bypass circuit of the plurality of bypass circuits to selectively bypass the corresponding energy storage unit in the series connection is controllable by means of at least two of the control modules. A related method is also disclosed.
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公开(公告)号:US12199144B2
公开(公告)日:2025-01-14
申请号:US18723764
申请日:2022-11-22
Applicant: Hitachi Energy Ltd
Inventor: Wolfgang Amadeus Vitale , Luca De-Michielis , Chiara Corvasce
IPC: H01L29/06 , H01L29/417 , H01L29/66 , H01L29/739 , H01L29/78
Abstract: A power semiconductor device comprises a semiconductor body, a gate electrode, and an extraction electrode, wherein the semiconductor body comprises a source region of a first conductivity type, well region of a second conductivity type different from the first conductivity type at the gate electrode, a drift region which is of the first conductivity type, and a barrier region which is of the first conductivity type, the barrier region is located between the drift region and the extraction electrode.
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公开(公告)号:US12199141B2
公开(公告)日:2025-01-14
申请号:US17912243
申请日:2021-03-12
Applicant: Hitachi Energy Ltd
Inventor: Wolfgang Amadeus Vitale , Luca De-Michielis , Boni Kofi Boksteen , Elizabeth Buitrago , Maxi Andenna
IPC: H01L29/861 , H01L21/265 , H01L21/266 , H01L29/06 , H01L29/66
Abstract: A semiconductor device a first semiconductor layer of a first conductivity type at a first main side of a semiconductor wafer and a second semiconductor layer of a second conductivity type at second main side. The second semiconductor layer forms a pn junction with the first semiconductor layer. A first electrode is in ohmic contact with the first semiconductor layer and a second electrode layer is in ohmic contact with the second semiconductor layer. A first semiconductor region of the first conductivity type completely embedded in the second semiconductor layer and a second semiconductor region of the first conductivity type completely embedded in the second semiconductor layer.
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公开(公告)号:US12190266B2
公开(公告)日:2025-01-07
申请号:US17491410
申请日:2021-09-30
Applicant: Hitachi Energy Ltd
Inventor: Srinivas Varadan , William Rutz
IPC: G06Q10/00 , G06F9/54 , G06Q10/0631 , G06Q10/20
Abstract: Resource-constrained, multi-period scheduling model for asset investment planning. In an embodiment, asset-related tasks for physical equipment are received, along with a time window. Each of the asset-related tasks is associated with parameter values for each time period within the time window. A resource-constrained project scheduling model is executed to identify an optimal portfolio of the asset-related tasks that satisfies a set of constraints, according to an objective, based on the parameter values for the asset-related tasks. In the optimal portfolio, each asset-related task is assigned to a time span comprising one or more time periods in the time window. The optimal portfolio may then be used to schedule the asset-related tasks in the optimal portfolio, in order to facilitate repair, maintenance, and capital tasks, for example, by automatically dispatching work orders or resources, automatically configuring a state of the physical equipment, informing an asset management system, and/or the like.
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公开(公告)号:US20240429733A1
公开(公告)日:2024-12-26
申请号:US18705161
申请日:2022-10-27
Applicant: HITACHI ENERGY LTD
Inventor: Xing HUANG , XiaoBo YANG , Andrew Mark Tuckey
IPC: H02J7/04 , G01R31/3842 , G01R31/389 , G01R31/392 , G01R31/396 , H01M10/42 , H01M10/44 , H02J3/32 , H02J7/00
Abstract: A method for controlling at least one power converter is disclosed. The method includes generating at least one electrochemical impedance spectra (EIS) reference signal, the at least one EIS reference signal each having a frequency selected for EIS: superimposing the at least one EIS reference signal respectively on at least one control reference signal to produce at least one superimposed reference signal: controlling the at least one power converter respectively based on the at least one superimposed reference signal to cause respectively charging/discharging at least one battery module: acquiring at least one response signal produced respectively by the at least one battery module; and calculating at least one EIS respectively for the at least one battery module respectively based on the at least one superimposed reference signal and the at least one response signal.
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公开(公告)号:US12166353B2
公开(公告)日:2024-12-10
申请号:US17682641
申请日:2022-02-28
Applicant: Hitachi Energy Ltd
Inventor: Katarina Knezovic , Dmitry Shchetinin , Marco Giuntoli , Milos Subasic , Peter Noglik , Giancarlo Dalle Ave
Abstract: The present disclosure relates to a method for determining phase connections of grid components in a power grid, the method comprising assessing a relative similarity of time series of measured voltage data of the grid components by clustering the time series of measured voltage data of the grid components; grouping the grid components into a plurality of clusters based on the assessing a relative similarity; and assessing a phase connection of the grid components in each cluster of the plurality of clusters. The present disclosure also relates to a respective device and computer program.
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