Method for error handling of an interconnection protocol, controller, and storage device

    公开(公告)号:US11716169B2

    公开(公告)日:2023-08-01

    申请号:US17684080

    申请日:2022-03-01

    Applicant: SK hynix Inc.

    CPC classification number: H04L1/0046 H04L1/0041 H04L1/0067 H04L67/1097

    Abstract: A method for error handling of an interconnection protocol, a controller and a storage device are provided. The method for error handling of an interconnection protocol is for use in a first device that is linkable to a second device according to the interconnection protocol, the method comprising: during or after a power mode change of a link between the first device and the second device: a) triggering, by the first device, a first line reset signal to the second device; b) performing, by the first device, suppression of detected rate overlap errors; and c) stopping the suppression of detected rate overlap errors after the first device receives a second line reset signal from the second device.

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