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    Field effect transistor having gate and source regions in recesses
    81.
    发明授权
    Field effect transistor having gate and source regions in recesses 失效
    场效应晶体管具有凹槽中的栅极和源极区域

    公开(公告)号：US5449932A

    公开(公告)日：1995-09-12

    申请号：US208837

    申请日：1994-03-11

    Applicant: Takayuki Fujii

    Inventor： Takayuki Fujii

    IPC: H01L27/095 ,  H01L21/285 ,  H01L21/338 ,  H01L29/812 ,  H01L29/48 ,  H01L29/56 ,  H01L29/64

    CPC classification number: H01L29/66863 ,  H01L21/28587 ,  H01L29/8128

    Abstract: A field effect transistor having a gate electrode in a recess includes a gate electrode and a source electrode in the same recess and a drain electrode outside the recess. Therefore, the gate-to-drain breakdown voltage is increased without increasing the source resistance. A method for producing such an FET includes forming a drain electrode on a semiconductor layer; depositing a first insulating film covering the drain electrode; etching a region of the first insulating film and a portion of the semiconductor layer through an aperture in the first insulating film, thereby producing a recess; depositing a metal film for forming a source electrode and a second insulating film in the recess, thereby forming a source electrode covered by the second insulating film; depositing a third insulating film and anisotropically etching the third insulating film, leaving side walls at the source electrode and the recess; depositing and patterning a gate electrode metal film, thereby forming a gate electrode in an aperture of the third insulating film and in the recess. The gate electrode is formed stably at a prescribed position in the recess and the gate length can be shortened by controlling the thickness of the third insulating film.

    Abstract translation: 在凹槽中具有栅电极的场效应晶体管包括在同一凹槽中的栅电极和源电极，以及凹陷外的漏电极。 因此，栅极至漏极的击穿电压增加而不增加源极电阻。 制造这种FET的方法包括在半导体层上形成漏电极; 沉积覆盖所述漏电极的第一绝缘膜; 通过第一绝缘膜中的孔蚀刻第一绝缘膜的区域和半导体层的一部分，从而产生凹陷; 在所述凹部中沉积用于形成源电极和第二绝缘膜的金属膜，由此形成被所述第二绝缘膜覆盖的源电极; 沉积第三绝缘膜并各向异性地蚀刻第三绝缘膜，在源电极和凹槽处留下侧壁; 沉积和图案化栅电极金属膜，从而在第三绝缘膜的孔中和凹部中形成栅电极。 栅电极在凹槽中的规定位置处稳定地形成，并且通过控制第三绝缘膜的厚度可以缩短栅极长度。

    Method of making field effect compound semiconductor device with eaves electrode
    82.
    发明授权
    Method of making field effect compound semiconductor device with eaves electrode 失效
    用檐电极制作场效复合半导体器件的方法

    公开(公告)号：US5445979A

    公开(公告)日：1995-08-29

    申请号：US330583

    申请日：1994-10-28

    Applicant: Hidenori Hirano

    Inventor： Hidenori Hirano

    IPC: H01L29/812 ,  H01L21/285 ,  H01L21/335 ,  H01L21/338 ,  H01L29/778 ,  H01L21/265 ,  H01L21/28

    CPC classification number: H01L29/66462 ,  H01L21/28587 ,  Y10S148/10

    Abstract: A semiconductor device comprises an active layer formed of a compound semiconductor for allowing carriers travel therethrough for exhibiting a function of the device, a protection layer including a non-doped compound semiconductor layer formed on the active layer, a pair of contact holes formed in the protection layer to expose the active layer, and an electrode filling the contact holes and covering the exposed active layer and extending on the protection layer. Generation of notch can be prevented even upon formation of a contact hole in the non-doped compound semiconductor layer and depositing electrode layer thereon.

    Abstract translation: 半导体器件包括由化合物半导体形成的有源层，用于允许载流子穿过其中以展现该器件的功能;保护层，包括形成在有源层上的非掺杂化合物半导体层，形成在该有源层上的一对接触孔 保护层以暴露有源层，以及填充接触孔并覆盖暴露的有源层并在保护层上延伸的电极。 即使在非掺杂化合物半导体层中形成接触孔并在其上沉积电极层，也可以防止产生凹口。

    Compound semiconductor device and method of making it
    83.
    发明授权
    Compound semiconductor device and method of making it 失效
    复合半导体器件及其制造方法

    公开(公告)号：US5412236A

    公开(公告)日：1995-05-02

    申请号：US230873

    申请日：1994-04-20

    Applicant: Masahisa Ikeya ,  Tadashi Saito ,  Kazuyuki Inokuchi

    Inventor： Masahisa Ikeya ,  Tadashi Saito ,  Kazuyuki Inokuchi

    IPC: H01L29/812 ,  H01L21/285 ,  H01L21/335 ,  H01L21/338 ,  H01L29/778 ,  H01L29/788 ,  H01L29/48 ,  H01L29/80

    CPC classification number: H01L21/28587 ,  H01L29/66462 ,  H01L29/7787 ,  H01L29/8128

    Abstract: In a method of making a semiconductor device, an active layer and a heavily doped cap layer are formed in turn on a semiconductor substrate, a first electrode is formed on the cap layer, a mask of a two-layer structure is formed on the cap layer, with the mask having an insulating film pattern having a non-inverted tapered opening, and a resist pattern having an inverted tapered opening and continuous with the non-inverted tapered opening, these openings being separated by a predetermined distance from the first electrode, and then a recess is formed, by performing an isotropic etching of the heavily doped layer exposed in the openings, with the recess having a bottom surface and a side wall surface rising from an edge of the bottom surface toward the upper edge with a constant radium off curvature. An oblique vapor deposition is then performed to form a second electrode to cover the bottom surface and the part of the side wall surface.

    Abstract translation: 在制造半导体器件的方法中，依次在半导体衬底上形成有源层和重掺杂覆盖层，在覆盖层上形成第一电极，在盖上形成两层结构的掩模 层，其中掩模具有具有非倒锥形开口的绝缘膜图案和具有倒锥形开口并与非倒锥形开口连续的抗蚀剂图案，这些开口与第一电极分开预定距离， 然后通过对在开口中暴露的重掺杂层进行各向同性蚀刻来形成凹部，其中凹部具有底表面和侧壁表面，其从底表面的边缘朝向上边缘以恒定的镭 关闭曲率。 然后进行倾斜气相沉积以形成覆盖底壁表面和侧壁表面的一部分的第二电极。

    Method for manufacturing a field effect transistor
    85.
    发明授权
    Method for manufacturing a field effect transistor 失效
    场效应晶体管的制造方法

    公开(公告)号：US5298444A

    公开(公告)日：1994-03-29

    申请号：US52549

    申请日：1993-04-26

    Applicant: Dietrich Ristow

    Inventor： Dietrich Ristow

    IPC: H01L21/302 ,  H01L21/033 ,  H01L21/285 ,  H01L21/3065 ,  H01L21/335 ,  H01L21/338 ,  H01L21/60 ,  H01L29/423 ,  H01L29/47 ,  H01L29/778 ,  H01L29/812 ,  H01L29/872 ,  H01L21/265

    CPC classification number: H01L21/76897 ,  H01L21/0334 ,  H01L21/28587 ,  H01L21/28593 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/66863

    Abstract: A method for manufacturing a field effect transistor which includes one more spacer provided in the gate recess adjacent the drain sidewall than adjacent the source sidewall in the contact such that a gate metallization is displaced asymmetrically toward a source side sidewall of the recess; and method for manufacturing same wherein oblique vapor deposition of an auxiliary layer into a recess for the gate region makes it possible for a spacer therein at the source side to be removed whereas a spacer of the drain side remains in place, such that the subsequent gate metallization is positioned closer to the source than to the drain.

    Abstract translation: 一种用于制造场效应晶体管的方法，该场效应晶体管包括设置在靠近漏极侧壁的栅极凹槽中的一个隔板，而不是邻近接触中的源极侧壁，使得栅极金属化朝向凹部的源极侧壁不对称地偏移; 及其制造方法，其中将辅助层倾斜蒸镀沉积到栅极区域的凹槽中，使源极侧的间隔物可以被去除，而排出侧的间隔物保持在适当的位置，使得随后的栅极 金属化被定位成比排水口更靠近源。

    Method of making field effect transistor
    86.
    发明授权
    Method of making field effect transistor 失效
    制作场效应晶体管的方法

    公开(公告)号：US5296398A

    公开(公告)日：1994-03-22

    申请号：US881291

    申请日：1992-05-11

    Applicant: Minoru Noda

    Inventor： Minoru Noda

    IPC: H01L29/812 ,  H01L21/285 ,  H01L21/336 ,  H01L21/338 ,  H01L29/08 ,  H01L29/423

    CPC classification number: H01L29/66878 ,  H01L21/28581 ,  H01L21/28587 ,  H01L29/0891 ,  H01L29/42316 ,  H01L29/66659

    Abstract: A field effect transistor having an asymmetric gate includes high dopant concentration source and drain regions. The drain region is shallower and of lower dopant concentration than the source region. The drain is spaced from the gate electrode. Therefore, an ideal FET having a reduced short channel effect and having a lower source resistance and high current drivability (gm) is obtained. When the drain region is produced by ion implantation through a film and the source region is produced by the implantation directly into the substrate, only the drain region is separated from the gate. When the insulating film on the source region is separated from the insulating film on the drain region, the insulating film on the source region is reliably selectively removed, whereby high controllability is obtained.

    Abstract translation: 具有不对称栅极的场效应晶体管包括高掺杂浓度源极和漏极区域。 漏极区域比源区域更浅，掺杂浓度低。 漏极与栅电极间隔开。 因此，获得了具有降低的短沟道效应并且具有较低源极电阻和高电流驱动能力（gm）的理想FET。 当通过离子注入通过膜产生漏极区域并且通过直接注入到衬底中产生源极区域时，只有漏极区域与栅极分离。 当源极区域上的绝缘膜与漏极区域上的绝缘膜分离时，源极区域上的绝缘膜被可靠地选择性地去除，从而获得高可控性。

    Floating channel field effect transistor and a fabricating method thereof
    88.
    发明授权
    Floating channel field effect transistor and a fabricating method thereof 失效
    浮动沟道场效应晶体管及其制造方法

    公开(公告)号：US5274257A

    公开(公告)日：1993-12-28

    申请号：US926715

    申请日：1992-08-07

    Applicant: Chang T. Kim ,  Young S. Kwon

    Inventor： Chang T. Kim ,  Young S. Kwon

    IPC: H01L21/20 ,  H01L21/285 ,  H01L21/338 ,  H01L29/06 ,  H01L29/10 ,  H01L29/80 ,  H01L29/812

    CPC classification number: H01L29/66863 ,  H01L21/28587 ,  H01L29/0649 ,  H01L29/1029

    Abstract: A field effect transistor is disclosed in which a source region and a drain region are formed to be reverse mesa on a semi-insulating semiconductor substrate with an insulating layer thereon by using a crystal growth characteristic corresponding to the crystal orientation. A channel layer and a gate electrode are formed by self-alignment on the upper part of a void formed according to the reverse mesa of the source and the drain regions, so that the channel layer and the semiconductor substrate are electrically separated by the void. By such a construction, a leakage current and backgating effect are removed, and a fast field effect transistor is attained owing to the reduction of an effective channel length and a gate resistance.

    Abstract translation: 公开了一种场效应晶体管，其中通过使用与晶体取向相对应的晶体生长特性，在其上具有绝缘层的半绝缘半导体衬底上形成源极区和漏极区作为反向台面。 在根据源极和漏极区域的反向台面形成的空隙的上部通过自对准形成沟道层和栅电极，使得沟道层和半导体衬底由空隙电隔离。 通过这样的结构，可以消除泄漏电流和背隙效应，并且由于有效沟道长度和栅极电阻的降低而获得快速场效应晶体管。

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