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公开(公告)号：US10332874B2
公开(公告)日：2019-06-25
申请号：US15585876
申请日：2017-05-03
发明人： Jin-Ping Han , Yulong Li , Dennis M. Newns , Paul M. Solomon , Xiao Sun
IPC分类号： H01L29/772 , H01L27/06 , H01L29/51 , H01L29/49 , H01L29/06
摘要： A metal-insulator-metal (MIM) capacitor structure includes source and drain regions formed within a semiconductor substrate, a first conducting layer formed over the source and drain regions, and a dielectric layer formed over the first conducting layer. The MIM capacitor structure further includes a second conducting layer formed over the dielectric layer, and a sidewall dielectric formed adjacent the first conducting layer and the dielectric layer. An electric field is created indirectly through the sidewall dielectric to an adjacent field effect transistor (FET) channel in the semiconductor substrate.
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82.发明申请公开(公告)号：US20190157203A1
公开(公告)日：2019-05-23
申请号：US16258041
申请日：2019-01-25
发明人： John Bruley , Jack O. Chu , Kam-Leung Lee , Ahmet S. Ozcan , Paul M. Solomon , Jeng-bang Yau
IPC分类号： H01L23/535 , C22C30/00 , H01L21/768 , H01L23/532 , H01L29/78
摘要： A method of forming a contact to a semiconductor device is provided that forms an alloy composed of nickel (Ni), platinum (Pt), aluminum (Al), titanium (Ti) and a semiconductor material. The methods may include forming a nickel and platinum semiconductor alloy at a base of a via. A titanium layer having an angstrom scale thickness is deposited in the via in contact with the nickel platinum semiconductor alloy. An aluminum containing fill is deposited atop the titanium layer. A forming gas anneal including an oxygen containing atmosphere is applied to the structure to provide a contact alloy comprising nickel, platinum, aluminum, titanium and a semiconductor element from the contact surface of the semiconductor device.
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公开(公告)号：US10242991B2
公开(公告)日：2019-03-26
申请号：US15640090
申请日：2017-06-30
发明人： Effendi Leobandung , Yulong Li , Paul M. Solomon , Chun-Chen Yeh
IPC分类号： H01L29/423 , H01L27/11521 , H01L29/788 , H01L29/66
摘要： A method for forming a floating gate memory cell includes: forming an active region on a semiconductor substrate; forming a gate stack on the active region, the gate stack including a first gate layer defining a floating gate of the memory cell structure, a dielectric layer formed on the first gate layer, and a second gate layer defining a control gate of the memory cell structure formed on the dielectric layer; forming first and second source/drain regions in the active region, self-aligned with the gate stack; forming an erase/injection gate on at least a portion of the dielectric layer and spaced laterally from the control gate, the erase/injection gate being proximate to and above the floating gate; and forming multiple contacts providing electrical connection with the first and second source/drain regions, the control gate and the erase/injection gate.
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公开(公告)号：US10170702B2
公开(公告)日：2019-01-01
申请号：US15404736
申请日：2017-01-12
摘要： A field effect transistor includes a carbon nanotube layer formed adjacent to a gate structure. Two intermetallic contacts are formed on the carbon nanotube layer. The two intermetallic contacts include an oxidation resistant compound having a work function below about 4.4 electron-volts.
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公开(公告)号：US20180205000A1
公开(公告)日：2018-07-19
申请号：US15804394
申请日：2017-11-06
发明人： Christine Armstrong , Matthew W. Copel , Yu Luo , Paul M. Solomon
IPC分类号： H01L41/332 , H01L41/16 , H01L41/39
CPC分类号： H01L21/32134 , H01L21/0256 , H01L21/0262 , H01L41/16 , H01L41/187 , H01L41/316 , H01L41/332 , H01L41/39
摘要： A subtractive forming method that includes providing a material stack including a samarium and selenium containing layer and an aluminum containing layer in direct contact with the samarium and selenium containing layer. The samarium component of the samarium and selenium containing layer of the exposed portion of the material stack is etched with an etch chemistry comprising citric acid and hydrogen peroxide that is selective to the aluminum containing layer. The hydrogen peroxide reacts with the aluminum containing layer to provide an oxide etch protectant surface on the aluminum containing layer, and the citric acid etches samarium selectively to the oxide etch protectant surface. Thereafter, a remaining selenium component of is removed by elevating a temperature of the selenium component.
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86.发明申请公开(公告)号：US20180113092A1
公开(公告)日：2018-04-26
申请号：US15299762
申请日：2016-10-21
发明人： Paul M. Solomon , Sufi Zafar
IPC分类号： G01N27/414 , G01N27/416
CPC分类号： G01N27/414 , H01L29/1087 , H01L29/408 , H01L29/42356 , H01L29/4238
摘要： A substrate's embedded substrate contact electrode forms a reference voltage point. A gate insulator is spaced outwardly from the substrate and has an exposed outer surface configured for contact with a fluid analyte. A device region is intermediate the substrate and the gate insulator; source and drain regions are adjacent the device region; and a field insulator is spaced outwardly of the drain region, the source region, and the substrate away from the device region. The gate insulator and the field oxide are formed of different materials having different chemical sensitivities to the fluid analyte. The field insulator is coupled to the substrate through the field insulator capacitance. The gate insulator capacitance is much smaller than the field insulator capacitance. The embedded substrate contact electrode can be connected to a separate voltage so that the electrical potential between the substrate and the source region can be controlled.
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公开(公告)号：US20180090681A1
公开(公告)日：2018-03-29
申请号：US15825171
申请日：2017-11-29
发明人： Bruce G. Elmegreen , Marcelo A. Kuroda , Xiao Hu Liu , Glenn J. Martyna , Dennis M. Newns , Paul M. Solomon
CPC分类号： H01L49/00 , H01L41/0986
摘要： A piezoelectronic device with novel force amplification includes a first electrode; a piezoelectric layer disposed on the first electrode; a second electrode disposed on the piezoelectric layer; an insulator disposed on the second electrode; a piezoresistive layer disposed on the insulator; a third electrode disposed on the insulator; a fourth electrode disposed on the insulator; a semi-rigid housing surrounding the layers and the electrodes; wherein the semi-rigid housing is in contact with the first, third, and fourth electrodes and the piezoresistive layer; wherein the semi-rigid housing includes a void. The third and fourth electrodes are on the same plane and separated from each other in the transverse direction by a distance.
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公开(公告)号：US09881759B2
公开(公告)日：2018-01-30
申请号：US14745521
申请日：2015-06-22
发明人： Matthew W. Copel , Bruce G. Elmegreen , Glenn J. Martyna , Dennis M. Newns , Thomas M. Shaw , Paul M. Solomon
CPC分类号： H01H57/00 , H01H49/00 , H01H2057/006
摘要： A piezoelectronic switch device for radio frequency (RF) applications includes a piezoelectric (PE) material layer and a piezoresistive (PR) material layer separated from one another by at least one electrode, wherein an electrical resistance of the PR material layer is dependent upon an applied voltage across the PE material layer by way of an applied pressure to the PR material layer by the PE material layer; and a conductive, high yield material (C-HYM) comprising a housing that surrounds the PE material layer, the PR material layer and the at least one electrode, the C-HYM configured to mechanically transmit a displacement of the PE material layer to the PR material layer such that applied voltage across the PE material layer causes an expansion thereof and an increase the applied pressure to the PR material layer, thereby causing a decrease in the electrical resistance of the PR material layer.
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公开(公告)号：US09472368B2
公开(公告)日：2016-10-18
申请号：US14529380
申请日：2014-10-31
发明人： Matthew W. Copel , Bruce G. Elmegreen , Glenn J. Martyna , Dennis M. Newns , Thomas M. Shaw , Paul M. Solomon
CPC分类号： H01H57/00 , H01H49/00 , H01H2057/006
摘要： A piezoelectronic switch device for radio frequency (RF) applications includes a piezoelectric (PE) material layer and a piezoresistive (PR) material layer separated from one another by at least one electrode, wherein an electrical resistance of the PR material layer is dependent upon an applied voltage across the PE material layer by way of an applied pressure to the PR material layer by the PE material layer; and a conductive, high yield material (C-HYM) comprising a housing that surrounds the PE material layer, the PR material layer and the at least one electrode, the C-HYM configured to mechanically transmit a displacement of the PE material layer to the PR material layer such that applied voltage across the PE material layer causes an expansion thereof and an increase the applied pressure to the PR material layer, thereby causing a decrease in the electrical resistance of the PR material layer.
摘要翻译： 用于射频（RF）应用的压电开关装置包括通过至少一个电极彼此分离的压电（PE）材料层和压阻（PR）材料层，其中PR材料层的电阻取决于 通过PE材料层通过施加的压力施加到PE材料层上的施加电压到PR材料层; 以及包括围绕所述PE材料层，所述PR材料层和所述至少一个电极的壳体的导电高收率材料（C-HYM），所述C-HYM被配置为机械地将所述PE材料层的位移传递到所述PE材料层 PR材料层，使得施加在PE材料层上的电压导致其膨胀，并且增加施加到PR材料层的压力，从而导致PR材料层的电阻降低。
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公开(公告)号：US20160268083A1
公开(公告)日：2016-09-15
申请号：US15163821
申请日：2016-05-25
发明人： Matthew W. Copel , Bruce G. Elmegreen , Glenn J. Martyna , Dennis M. Newns , Thomas M. Shaw , Paul M. Solomon
IPC分类号： H01H57/00
CPC分类号： H01H57/00 , H01H49/00 , H01H2057/006
摘要： A piezoelectronic switch device for radio frequency (RF) applications includes a piezoelectric (PE) material layer and a piezoresistive (PR) material layer separated from one another by at least one electrode, wherein an electrical resistance of the PR material layer is dependent upon an applied voltage across the PE material layer by way of an applied pressure to the PR material layer by the PE material layer; and a conductive, high yield material (C-HYM) comprising a housing that surrounds the PE material layer, the PR material layer and the at least one electrode, the C-HYM configured to mechanically transmit a displacement of the PE material layer to the PR material layer such that applied voltage across the PE material layer causes an expansion thereof and an increase the applied pressure to the PR material layer, thereby causing a decrease in the electrical resistance of the PR material layer.
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