Equalizing a transmitter
    71.
    发明授权
    Equalizing a transmitter 有权
    变送器均衡

    公开(公告)号:US07596174B2

    公开(公告)日:2009-09-29

    申请号:US11237118

    申请日:2005-09-28

    IPC分类号: H04B7/30

    摘要: In one embodiment, the present invention includes a method for associating a first plurality of current sources with a first tap coefficient and associating a second plurality of current sources with a second tap coefficient. A first plurality of output switches coupled to the first plurality of current sources is gated using the first tap coefficient and a second plurality of output switches coupled to the second plurality of current sources is gated using the second tap coefficient. In such manner, the first and second plurality of equalized current sources may be driven onto an interconnect. Other embodiments are described and claimed.

    摘要翻译: 在一个实施例中,本发明包括用于将第一多个电流源与第一抽头系数相关联并将第二多个电流源与第二抽头系数相关联的方法。 耦合到第一多个电流源的第一多个输出开关使用第一抽头系数进行门控,并且使用第二抽头系数选择耦合到第二多个电流源的第二多个输出开关。 以这种方式,第一和第二多个均衡的电流源可以被驱动到互连上。 描述和要求保护其他实施例。

    LVDS OUTPUT DRIVER
    72.
    发明申请
    LVDS OUTPUT DRIVER 审中-公开
    LVDS输出驱动器

    公开(公告)号:US20090167369A1

    公开(公告)日:2009-07-02

    申请号:US12146723

    申请日:2008-06-26

    IPC分类号: H03K3/00

    CPC分类号: H03K19/018528 H04L25/0276

    摘要: An output driver is disclosed. The output driver has a pair of differential outputs coupled to a first supply voltage via a pair of load devices and comprises a current source, a pair of low voltage transistors, a pair of high voltage transistors, and a resistor. The current source has one end coupled to a second supply voltage. Each of the low voltage transistors has a first terminal coupled to the other end of the current source, a second terminal receiving a low voltage signal, and a third terminal. Each of the high voltage transistors has a first terminal coupled to the third terminal of a corresponding one of the low voltage transistors, a second terminal coupled to a bias voltage and a third terminal coupled to the output. The resistor is connected between the third terminals of the high voltage transistors.

    摘要翻译: 公开了一种输出驱动器。 输出驱动器具有通过一对负载装置耦合到第一电源电压的一对差分输出,并且包括电流源,一对低压晶体管,一对高压晶体管和电阻器。 电流源具有耦合到第二电源电压的一端。 每个低电压晶体管具有耦合到电流源的另一端的第一端子,接收低电压信号的第二端子和第三端子。 每个高压晶体管具有耦合到相应的一个低压晶体管的第三端子的第一端子,耦合到偏置电压的第二端子和耦合到输出端的第三端子。 电阻器连接在高压晶体管的第三端子之间。

    LOW POWER DIFFERENTIAL SIGNALING TRANSMITTER
    73.
    发明申请
    LOW POWER DIFFERENTIAL SIGNALING TRANSMITTER 有权
    低功率差分信号发射机

    公开(公告)号:US20090160495A1

    公开(公告)日:2009-06-25

    申请号:US12057394

    申请日:2008-03-28

    IPC分类号: H03B1/00

    摘要: A low power differential signaling transmitter includes a switchable current source apparatus and a differential signaling generator coupled to the switchable current source apparatus. The switchable current source apparatus receives a first input voltage and a second input voltage, and generates a plurality of reference currents according to the first input voltage and the second input voltage. The differential signaling generator includes a plurality of first transistors, a plurality of second transistors, a first output voltage terminal and a second output voltage terminal. The on or off states of the first transistors and the second transistors are controlled by the reference currents. The first output voltage terminal outputs a first output voltage, and the second output voltage terminal outputs a second output voltage. The first output voltage and the second output voltage are determined according to the on or off states of the first and second transistors.

    摘要翻译: 低功率差分信令发射机包括可切换电流源装置和耦合到可切换电流源装置的差分信号发生器。 可切换电流源装置接收第一输入电压和第二输入电压,并且根据第一输入电压和第二输入电压产生多个参考电流。 差分信号发生器包括多个第一晶体管,多个第二晶体管,第一输出电压端子和第二输出电压端子。 第一晶体管和第二晶体管的导通或截止状态由参考电流控制。 第一输出电压端子输出第一输出电压,第二输出电压端子输出第二输出电压。 根据第一和第二晶体管的导通或截止状态确定第一输出电压和第二输出电压。

    METHOD OF FABRICATING BIPOLAR TRANSISTORS AND HIGH-SPEED LVDS DRIVER WITH THE BIPOLAR TRANSISTORS
    74.
    发明申请
    METHOD OF FABRICATING BIPOLAR TRANSISTORS AND HIGH-SPEED LVDS DRIVER WITH THE BIPOLAR TRANSISTORS 审中-公开
    用双极晶体管制作双极晶体管和高速LVDS驱动器的方法

    公开(公告)号:US20080136464A1

    公开(公告)日:2008-06-12

    申请号:US11933025

    申请日:2007-10-31

    IPC分类号: H03K3/00 H01L21/8249

    摘要: Provided is a differential signal driver capable of operating at a high speed at a low voltage of 1.8V. The differential signal driver includes: a differential-signal driving circuit for switching input differential signals and outputting a common mode voltage through first and second output nodes; and a common-mode feedback circuit for providing a predetermined current to the differential-signal driving circuit or receiving a predetermined current from the differential-signal driving circuit in response to the common mode voltage. The differential-signal driving circuit includes a common-mode voltage output circuit for connecting the first output node to the second output node and generating the common mode voltage of the differential-signal driving circuit. The differential input signals are received through two bipolar transistors.

    摘要翻译: 提供能够以1.8V的低电压高速运行的差分信号驱动器。 差分信号驱动器包括:差分信号驱动电路,用于切换输入差分信号并通过第一和第二输出节点输出共模电压; 以及共模反馈电路,用于响应于共模电压,向差分信号驱动电路提供预定电流或从差分信号驱动电路接收预定电流。 差分信号驱动电路包括用于将第一输出节点连接到第二输出节点并产生差动信号驱动电路的共模电压的共模电压输出电路。 差分输入信号通过两个双极晶体管接收。

    ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT
    75.
    发明申请
    ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT 失效
    静电放电保护电路

    公开(公告)号:US20080062600A1

    公开(公告)日:2008-03-13

    申请号:US11935289

    申请日:2007-11-05

    IPC分类号: H02H9/04 H02H9/00

    CPC分类号: H04L25/0276

    摘要: A network device comprises an interface coupling an electronic device to a differential pair of signal lines, and an integrated active common mode suppression and electrostatic discharge protection circuit coupled to the interface in parallel to differential signal lines of the electronic device.

    摘要翻译: 网络设备包括将电子设备耦合到差分信号线对的接口以及并联于电子设备的差分信号线的接口耦合的集成的有源共模抑制和静电放电保护电路。

    Noise-tolerant signaling schemes supporting simplified timing and data recovery

    公开(公告)号:US20070297520A1

    公开(公告)日:2007-12-27

    申请号:US11895415

    申请日:2007-08-23

    IPC分类号: H04B1/10

    摘要: Described are communication systems that convey differential and common-mode signals over the same differential channel. Noise-tolerant communication schemes use low-amplitude common-mode signals that are easily rejected by differential receivers, thus allowing for very high differential data rates. Some embodiments employ the common-mode signals to transmit backchannel signals for adjusting the characteristics of the differential transmitter. Backchannel control signals are effectively conveyed even if the forward channel transmitter is so maladjusted that the received differential data is unrecognizable. Systems in accordance with the above-described embodiments obtain these advantages without additional pins or communications channels, and are compatible with both AC-coupled and DC-coupled communications channels. Data coding schemes and corresponding data recovery circuits eliminate the need for complex, high-speed CDR circuits.

    Stable process induced correction bias circuitry for receivers on single-ended applications
    77.
    发明授权
    Stable process induced correction bias circuitry for receivers on single-ended applications 失效
    用于单端应用的接收器的稳定过程感应校正偏置电路

    公开(公告)号:US07313372B2

    公开(公告)日:2007-12-25

    申请号:US10902559

    申请日:2004-07-29

    IPC分类号: H04B1/04 H04Q11/12

    CPC分类号: H04L25/0276 H04L25/0296

    摘要: A second single-ended receiver having a first stage for receiving an input signal and outputting a pair of corresponding output signals, and a second stage for receiving the pair of output signals and outputting a corresponding single output signal. First and second pull-down transistors are coupled to first and second inputs to the first stage. A bias circuit electrically biases the first stage, second stage, and first and second pull-down transistors, and a power supply provides power to those components.

    摘要翻译: 第二单端接收机,具有用于接收输入信号并输出​​一对相应输出信号的第一级,以及用于接收一对输出信号并输出​​相应的单输出信号的第二级。 第一和第二下拉晶体管耦合到第一和第二输入到第一级。 偏置电路电偏置第一级,第二级以及第一和第二下拉式晶体管,并且电源为这些部件提供电力。

    Apparatus and method for transmitting signals
    78.
    发明申请
    Apparatus and method for transmitting signals 审中-公开
    用于发送信号的装置和方法

    公开(公告)号:US20070049235A1

    公开(公告)日:2007-03-01

    申请号:US11509732

    申请日:2006-08-25

    申请人: Kye-hyun Kyung

    发明人: Kye-hyun Kyung

    IPC分类号: H04B1/26

    CPC分类号: H04L25/0272 H04L25/0276

    摘要: A signal transmission apparatus may transmit and receive a differential signal using transmission lines. The apparatus may include a transmitter and a receiver. The transmitter may transmit a mixed signal obtained by mixing the differential signal with a single ended signal. The receiver may restore the differential signal and the single ended signal from the mixed signal. An edge of the single ended signal may have a phase difference of about 90° with an edge of the differential signal. The signal transmission apparatus and method may transmit two signals through a single channel to reduce a circuit area.

    摘要翻译: 信号发送装置可以使用传输线路发送和接收差分信号。 该装置可以包括发射机和接收机。 发射机可以发送通过将差分信号与单端信号混合而获得的混合信号。 接收机可以从混合信号中恢复差分信号和单端信号。 单端信号的边沿可以与差分信号的边缘具有约90°的相位差。 信号发送装置和方法可以通过单个信道发送两个信号以减少电路面积。

    Buffer circuit device supplying a common mode voltage applicable to a next-stage circuit receiving output signals of the buffer circuit device
    79.
    发明授权
    Buffer circuit device supplying a common mode voltage applicable to a next-stage circuit receiving output signals of the buffer circuit device 有权
    提供适用于接收缓冲电路装置的输出信号的下一级电路的共模电压的缓冲电路装置

    公开(公告)号:US07098699B2

    公开(公告)日:2006-08-29

    申请号:US10716533

    申请日:2003-11-20

    IPC分类号: H03B1/00

    摘要: A buffer circuit device, which receives differential input signals and outputs differential output signals, has a buffer circuit, a common mode level generator circuit, a common mode voltage detection circuit, and a bias voltage adjusting circuit. The buffer circuit receives the input signals and outputs the output signals, and the common mode level generator circuit outputs a specific level of a common mode voltage of the output signals to be output from the buffer circuit. The common mode voltage detection circuit detects a common mode voltage of specific signals, and the bias voltage adjusting circuit adjusts a bias voltage to be supplied to the buffer circuit by comparing an output signal of the common mode level generator circuit with an output signal of the common mode voltage detection circuit.

    摘要翻译: 接收差分输入信号并输出​​差分输出信号的缓冲电路装置具有缓冲电路,共模电平发生电路,共模电压检测电路和偏置电压调整电路。 缓冲电路接收输入信号并输出​​输出信号,共模电平发生器电路输出要从缓冲电路输出的输出信号的共模电压的特定电平。 共模电压检测电路检测特定信号的共模电压,偏置电压调节电路通过将共模电平发生器电路的输出信号与输出信号进行比较来调整提供给缓冲电路的偏置电压 共模电压检测电路。

    Method and apparatus for concurrently transmitting a digital control signal and an analog signal from a sending circuit to a receiving circuit
    80.
    发明申请
    Method and apparatus for concurrently transmitting a digital control signal and an analog signal from a sending circuit to a receiving circuit 审中-公开
    用于将数字控制信号和模拟信号从发送电路同时发送到接收电路的方法和装置

    公开(公告)号:US20060187971A1

    公开(公告)日:2006-08-24

    申请号:US11062158

    申请日:2005-02-18

    申请人: Richard Lum Ka Lam

    发明人: Richard Lum Ka Lam

    IPC分类号: H04J3/04 H04J3/12 H03M3/00

    摘要: An apparatus and method for simultaneously transmitting a digital control signal and an analog signal from a sending circuit to a receiving circuit are described. An analog signal (e.g., a differential data signal) is received. A digital signal (e.g., a digital logic signal) is also received. The digital signal is then combined with the analog signal to generate an analog signal with an embedded digital signal. The analog signal with an embedded digital signal is then transmitted through a common communication link (e.g., a pair of conductors). The digital signal is then recovered from the analog signal with an embedded digital signal without affecting the recovery of the analog signal.

    摘要翻译: 描述了一种用于从发送电路向接收电路同时发送数字控制信号和模拟信号的装置和方法。 接收模拟信号(例如差分数据信号)。 还接收数字信号(例如,数字逻辑信号)。 然后将数字信号与模拟信号组合以产生具有嵌入式数字信号的模拟信号。 具有嵌入数字信号的模拟信号然后通过公共通信链路(例如,一对导体)传输。 然后使用嵌入式数字信号从模拟信号中恢复数字信号,而不影响模拟信号的恢复。