公开(公告)号：US07596174B2

公开(公告)日：2009-09-29

申请号：US11237118

申请日：2005-09-28

申请人： Karthisha S. Canagasaby ,  Muraleedhara Navada ,  Sanjay Dabral

发明人： Karthisha S. Canagasaby ,  Muraleedhara Navada ,  Sanjay Dabral

IPC分类号： H04B7/30

CPC分类号： H04L25/0282 ,  H04L25/0276 ,  H04L25/0288

摘要： In one embodiment, the present invention includes a method for associating a first plurality of current sources with a first tap coefficient and associating a second plurality of current sources with a second tap coefficient. A first plurality of output switches coupled to the first plurality of current sources is gated using the first tap coefficient and a second plurality of output switches coupled to the second plurality of current sources is gated using the second tap coefficient. In such manner, the first and second plurality of equalized current sources may be driven onto an interconnect. Other embodiments are described and claimed.

摘要翻译： 在一个实施例中，本发明包括用于将第一多个电流源与第一抽头系数相关联并将第二多个电流源与第二抽头系数相关联的方法。 耦合到第一多个电流源的第一多个输出开关使用第一抽头系数进行门控，并且使用第二抽头系数选择耦合到第二多个电流源的第二多个输出开关。 以这种方式，第一和第二多个均衡的电流源可以被驱动到互连上。 描述和要求保护其他实施例。