发明授权
US07313372B2 Stable process induced correction bias circuitry for receivers on single-ended applications
失效
用于单端应用的接收器的稳定过程感应校正偏置电路
- 专利标题: Stable process induced correction bias circuitry for receivers on single-ended applications
- 专利标题(中): 用于单端应用的接收器的稳定过程感应校正偏置电路
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申请号: US10902559申请日: 2004-07-29
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公开(公告)号: US07313372B2公开(公告)日: 2007-12-25
- 发明人: Manuel Salcido , Gilbert Yoh , Guy Humphrey , Salvador Salcido
- 申请人: Manuel Salcido , Gilbert Yoh , Guy Humphrey , Salvador Salcido
- 申请人地址: SG Singapore
- 专利权人: Avago Technologies General IP Pte Ltd
- 当前专利权人: Avago Technologies General IP Pte Ltd
- 当前专利权人地址: SG Singapore
- 主分类号: H04B1/04
- IPC分类号: H04B1/04 ; H04Q11/12
摘要:
A second single-ended receiver having a first stage for receiving an input signal and outputting a pair of corresponding output signals, and a second stage for receiving the pair of output signals and outputting a corresponding single output signal. First and second pull-down transistors are coupled to first and second inputs to the first stage. A bias circuit electrically biases the first stage, second stage, and first and second pull-down transistors, and a power supply provides power to those components.
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