公开(公告)号：US11251071B2

公开(公告)日：2022-02-15

申请号：US16852987

申请日：2020-04-20

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Hua Yu ,  An-Jhih Su ,  Chi-Hsi Wu ,  Der-Chyang Yeh ,  Ming Shih Yeh ,  Jing-Cheng Lin ,  Hung-Jui Kuo

IPC分类号： H01L21/768 ,  H01L23/522 ,  H01L23/538 ,  H01L23/498 ,  H01L23/48 ,  H01L23/00 ,  H01L21/48

摘要： A method includes forming a metal layer extending into openings of a dielectric layer to contact a first metal pad and a second metal pad, and bonding a bottom terminal of a component device to the metal layer. The metal layer has a first portion directly underlying and bonded to the component device. A raised via is formed on the metal layer, and the metal layer has a second portion directly underlying the raised via. The metal layer is etched to separate the first portion and the second portion of the metal layer from each other. The method further includes coating the raised via and the component device in a dielectric layer, revealing the raised via and a top terminal of the component device, and forming a redistribution line connecting the raised via to the top terminal.

公开(公告)号：US11189603B2

公开(公告)日：2021-11-30

申请号：US16206281

申请日：2018-11-30

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Hua Yu ,  Der-Chyang Yeh ,  Han-Ping Pu

IPC分类号： H01L25/10 ,  H01L23/48 ,  H01L23/00 ,  H01L23/367 ,  H01L23/31 ,  H01L21/56 ,  H01L25/00 ,  H01L23/14 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H01L23/42 ,  H01L21/48

摘要： An embodiment is a package including a first package structure. The first package structure includes a first integrated circuit die having an active side and a back-side, the active side comprising die connectors, a first electrical connector adjacent the first integrated circuit die, an encapsulant laterally encapsulating the first integrated circuit die and the first electrical connector, a first redistribution structure on and electrically connected to the die connectors of the first integrated circuit die and the first electrical connector, and thermal elements on the back-side of the first integrated circuit die. The package further includes a second package structure bonded to the first electrical connector and the thermal elements with a first set of conductive connectors.

公开(公告)号：US11152323B2

公开(公告)日：2021-10-19

申请号：US16391022

申请日：2019-04-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Hua Yu ,  Chien-Yu Li ,  Hung-Jui Kuo ,  Li-Hsien Huang ,  Hsien-Wei Chen ,  Der-Chyang Yeh ,  Chung-Shi Liu ,  Shin-Puu Jeng

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L21/56

摘要： Package structures and methods of forming package structures are discussed. A package structure, in accordance with some embodiments, includes an integrated circuit die, an encapsulant at least laterally encapsulating the integrated circuit die, a redistribution structure on the integrated circuit die and the encapsulant, a connector support metallization coupled to the redistribution structure, and an external connector on the connector support metallization. The redistribution structure includes a dielectric layer disposed distally from the encapsulant and the integrated circuit die. The connector support metallization has a first portion on a surface of the dielectric layer and has a second portion extending in an opening through the dielectric layer. The first portion of the connector support metallization has a sloped sidewall extending in a direction away from the surface of the dielectric layer.

公开(公告)号：US11018088B2

公开(公告)日：2021-05-25

申请号：US16436494

申请日：2019-06-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Cheng-Hsien Hsieh ,  Li-Han Hsu ,  Wei-Cheng Wu ,  Hsien-Wei Chen ,  Der-Chyang Yeh ,  Chi-Hsi Wu ,  Chen-Hua Yu

IPC分类号： H01L23/538 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L25/10 ,  H01L25/00

摘要： An embodiment device includes an integrated circuit die and a first metallization pattern over the integrated circuit die. The first metallization pattern includes a first dummy pattern having a first hole extending through a first conductive region. The device further includes a second metallization pattern over the first metallization pattern. The second metallization pattern includes a second dummy pattern having a second hole extending through a second conductive region. The second hole is arranged projectively overlapping a portion of the first hole and a portion of the first conductive region.

公开(公告)号：US10964666B2

公开(公告)日：2021-03-30

申请号：US15645487

申请日：2017-07-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Hua Yu ,  Der-Chyang Yeh ,  Kuo-Chung Yee ,  Jui-Pin Hung

IPC分类号： H01L25/065 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L25/10 ,  H01L23/498 ,  H01L23/538 ,  H01L21/78 ,  H01L23/31 ,  H01L23/48 ,  H01L21/768 ,  H01L23/00 ,  H01L25/00 ,  H01L21/027 ,  H01L21/288 ,  H01L21/321 ,  H01L21/66

摘要： A system and method for packaging semiconductor device is provided. An embodiment comprises forming vias over a carrier wafer and attaching a first die over the carrier wafer and between a first two of the vias. A second die is attached over the carrier wafer and between a second two of the vias. The first die and the second die are encapsulated to form a first package, and at least one third die is connected to the first die or the second die. A second package is connected to the first package over the at least one third die.

公开(公告)号：US20210005556A1

公开(公告)日：2021-01-07

申请号：US17026597

申请日：2020-09-21

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Hua Yu ,  An-Jhih Su ,  Chi-Hsi Wu ,  Der-Chyang Yeh ,  Ming Shih Yeh ,  Wei-Cheng Wu

IPC分类号： H01L23/538 ,  H01L21/56 ,  H01L25/16 ,  H01L23/00 ,  H01L21/768 ,  H01L21/3105 ,  H01L25/00 ,  H01L21/683 ,  H01L25/065

摘要： A multi-stacked package-on-package structure includes a method. The method includes: adhering a first die and a plurality of second dies to a substrate, the first die having a different function from each of the plurality of second dies; attaching a passive device over the first die; encapsulating the first die, the plurality of second dies, and the passive device; and forming a first redistribution structure over the passive device, the first die, and the plurality of second dies, the passive device connecting the first die to the first redistribution structure.

公开(公告)号：US20200373266A1

公开(公告)日：2020-11-26

申请号：US16989312

申请日：2020-08-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chi-Hsi Wu ,  Der-Chyang Yeh ,  Hsien-Wei Chen ,  Jie Chen

IPC分类号： H01L23/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/48 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H01L25/00

摘要： An embodiment is a method including forming a first passive device in a first wafer, forming a first dielectric layer over a first side of the first wafer, forming a first plurality of bond pads in the first dielectric layer, planarizing the first dielectric layer and the first plurality of bond pads to level top surfaces of the first dielectric layer and the first plurality of bond pads with each other, hybrid bonding a first device die to the first dielectric layer and at least some of the first plurality of bond pads, and encapsulating the first device die in a first encapsulant.

公开(公告)号：US10714426B2

公开(公告)日：2020-07-14

申请号：US16113665

申请日：2018-08-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Cheng-Hsien Hsieh ,  Li-Han Hsu ,  Wei-Cheng Wu ,  Hsien-Wei Chen ,  Der-Chyang Yeh ,  Chi-Hsi Wu ,  Chen-Hua Yu ,  Tsung-Shu Lin

IPC分类号： H01L23/538 ,  H01L21/48 ,  H01L25/10 ,  H01L25/00 ,  H01L23/31 ,  H01L23/498 ,  H01L21/56

摘要： An embodiment is a structure including a first die having an active surface with a first center point, a molding compound at least laterally encapsulating the first die, and a first redistribution layer (RDL) including metallization patterns extending over the first die and the molding compound. A first portion of the metallization patterns of the first RDL extending over a first portion of a boundary of the first die to the molding compound, the first portion of the metallization patterns not extending parallel to a first line, the first line extending from the first center point of the first die to the first portion of the boundary of the first die.

公开(公告)号：US10700032B2

公开(公告)日：2020-06-30

申请号：US16532162

申请日：2019-08-05

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shuo-Mao Chen ,  Der-Chyang Yeh ,  Li-Hsien Huang

IPC分类号： H01L23/00 ,  H01L23/31 ,  H01L23/522 ,  H01L23/525 ,  H01L21/56 ,  H01L23/538 ,  H01L21/768

摘要： An embodiment is a device comprising a substrate, a metal pad over the substrate, and a passivation layer comprising a portion over the metal pad. The device further comprises a metal pillar over and electrically coupled to the metal pad, and a passive device comprising a first portion at a same level as the metal pillar, wherein the first portion of the passive device is formed of a same material as the metal pillar.

公开(公告)号：US10665468B2

公开(公告)日：2020-05-26

申请号：US16048013

申请日：2018-07-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chen-Hua Yu ,  Der-Chyang Yeh

IPC分类号： H01L21/31 ,  H01L21/3105 ,  H01L25/00 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56 ,  H01L25/065 ,  H01L25/18 ,  H01L21/683 ,  H01L23/48 ,  H01L23/498

摘要： A device includes a first chip is embedded in a molding compound layer, wherein the first chip is shifted toward a first direction, a second chip over the first chip and embedded in the molding compound layer, wherein the second chip is shifted toward a second direction opposite to the first direction and a plurality of bumps between the first chip and the second chip.