公开(公告)号：US20230328244A1

公开(公告)日：2023-10-12

申请号：US18297463

申请日：2023-04-07

Applicant: QUALCOMM Incorporated

Inventor： Bappaditya Ray ,  Vadim Seregin ,  Marta Karczewicz

IPC: H04N19/122 ,  H04N19/176 ,  H04N19/159 ,  H04N19/61 ,  H04N19/18 ,  H04N19/70

CPC classification number: H04N19/122 ,  H04N19/176 ,  H04N19/159 ,  H04N19/61 ,  H04N19/18 ,  H04N19/70

Abstract: A video coder may adaptively determine whether to apply an inter-MTS (multiple transform set) mode to video data. The video coder may adaptively determine one or more of a maximum block size or a minimum block size for applying an inter-MTS mode. The video decoder may determine whether the inter-MTS mode is enabled for a block of video data based on a size of the block compared to one or more of the minimum block size or the maximum block size. and code the block using the inter-MTS mode based on the inter-MTS mode being enabled. Coding the block using the inter-MTS mode includes applying one or more transforms of a plurality of transforms to transform coefficients associated with the block of video data.

公开(公告)号：US11785223B2

公开(公告)日：2023-10-10

申请号：US17321302

申请日：2021-05-14

Applicant: Qualcomm Incorporated

Inventor： Vadim Seregin ,  Wei-Jung Chien ,  Han Huang ,  Marta Karczewicz

IPC: H04N19/433 ,  H04N19/14 ,  H04N19/105 ,  H04N19/176 ,  H04N19/423 ,  H04N19/119

CPC classification number: H04N19/14 ,  H04N19/105 ,  H04N19/119 ,  H04N19/176 ,  H04N19/423

Abstract: A video coder can be configured to code video data by determining a first block size threshold for a block of video data; determining a second block size threshold, wherein the second block size threshold is smaller than the first block size threshold; partitioning the block of video data into smaller sub-blocks; in response to determining that a first partition of the partitioned block is smaller or equal to the first block size threshold, determining that blocks within the partition belong to a parallel estimation area; and in response to determining that a second partition of the partitioned block is smaller or equal to the second block size threshold, determining that blocks within the second partition belong to an area for a shared candidate list.

公开(公告)号：US20230319269A1

公开(公告)日：2023-10-05

申请号：US18331762

申请日：2023-06-08

Applicant: QUALCOMM Incorporated

Inventor： Sungwon Lee ,  Wei-Jung Chien ,  Adarsh Krishnan Ramasubramonian ,  Muhammed Zeyd Coban ,  Jianle Chen ,  Yi-Wen Chen ,  Marta Karczewicz

IPC: H04N19/114 ,  H04N19/70 ,  H04N19/159 ,  H04N19/107 ,  H04N19/31 ,  H04N19/187

CPC classification number: H04N19/114 ,  H04N19/70 ,  H04N19/159 ,  H04N19/107 ,  H04N19/31 ,  H04N19/187

Abstract: A device for encoding video data includes a memory configured to store video data, and a video encoder implemented in circuitry and configured to encode a future picture of the video data having a first display order position, the future picture being included in an intra period (IP) of the video data, the IP comprising a plurality of groups of pictures (GOPs), and after encoding the future picture, encode a picture of an ordinal first GOP of the plurality of GOPs using the future picture as a reference picture, each picture of the ordinal first GOP having display order positions earlier than the first display order position. Encoding the future picture in this manner may result in encoding performance improvements with minimal increases in encoding and decoding complexity.

公开(公告)号：US20230308642A1

公开(公告)日：2023-09-28

申请号：US18325738

申请日：2023-05-30

Applicant: QUALCOMM Incorporated

Inventor： Chun-Chi Chen ,  Han Huang ,  Vadim Seregin ,  Marta Karczewicz

IPC: H04N19/105 ,  H04N19/159 ,  H04N19/176 ,  H04N19/186 ,  H04N19/51 ,  G06T9/00 ,  H04N19/189

CPC classification number: H04N19/105 ,  H04N19/159 ,  H04N19/176 ,  H04N19/186 ,  H04N19/51 ,  G06T9/004 ,  H04N19/189

Abstract: An example device for decoding video data includes memory configured to store the video data and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to reshape a pixel domain reference template block using a forward mapping function into a mapped domain reference template block and derive local illumination compensation (LIC) model parameters from the mapped domain reference template block and a mapped domain neighboring reconstruction template block. The one or more processors are configured to apply the LIC model parameters to motion-compensated prediction signals and decode the video data based on the application of the LIC model parameters.

公开(公告)号：US20230300368A1

公开(公告)日：2023-09-21

申请号：US18304964

申请日：2023-04-21

Applicant: QUALCOMM Incorporated

Inventor： Han Huang ,  Jianle Chen ,  Wei-Jung Chien ,  Marta Karczewicz

IPC: H04N19/52 ,  H04N19/70 ,  H04N19/176 ,  H04N19/132 ,  H04N19/46

CPC classification number: H04N19/52 ,  H04N19/132 ,  H04N19/176 ,  H04N19/46 ,  H04N19/70

Abstract: An example method includes encoding, in a video bitstream, a first syntax element specifying whether affine model based motion compensation is enabled; based on affine model based motion compensation being enabled, encoding, in the video bitstream, a second syntax element specifying a maximum number of subblock-based merging motion vector prediction candidates, wherein a value of the second syntax element is constrained based on a value other than a value of the first syntax element; and encoding a picture of the video data based on the maximum number of subblock-based merging motion vector prediction candidates.

公开(公告)号：US20230283770A1

公开(公告)日：2023-09-07

申请号：US18175282

申请日：2023-02-27

Applicant: QUALCOMM Incorporated

Inventor： Yao-Jen Chang ,  Vadim Seregin ,  Marta Karczewicz

IPC: H04N19/105 ,  H04N19/52 ,  H04N19/139 ,  H04N19/176

CPC classification number: H04N19/105 ,  H04N19/52 ,  H04N19/139 ,  H04N19/176

Abstract: A device for decoding video data can be configured to determine that a block is coded in an overlapped block motion compensation (OBMC) mode; determine a first prediction block for the block using a first motion vector for the block; determine a second prediction block for the block using a second motion vector, wherein the second motion is a motion vector of a neighboring block of the block; select an OBMC blending process from a plurality of available OBMC blending processes; blend the first prediction block and the second prediction block using the selected OBMC blending process to determine a blended block; and reconstruct the block using the blended block.

公开(公告)号：US11743501B2

公开(公告)日：2023-08-29

申请号：US17223789

申请日：2021-04-06

Applicant: QUALCOMM Incorporated

Inventor： Adarsh Krishnan Ramasubramonian ,  Bappaditya Ray ,  Geert Van der Auwera ,  Louis Joseph Kerofsky ,  Marta Karczewicz

IPC: H04N19/70 ,  H04N19/119 ,  H04N19/597 ,  H04N19/136 ,  H04N19/174

CPC classification number: H04N19/70 ,  H04N19/119 ,  H04N19/136 ,  H04N19/174 ,  H04N19/597

Abstract: An example device for decoding point cloud data includes memory configured to store the point cloud data and one or more processors implemented in circuitry and coupled to the memory. The one or more processors are configured to determine dimensions of a region box and determine dimensions of a slice bounding box. The one or more processors are also configured to decode a slice of the point cloud data associated with the slice bounding box. The dimensions of the region box are constrained to not exceed the dimensions of the slice bounding box.

公开(公告)号：US11729428B2

公开(公告)日：2023-08-15

申请号：US17482012

申请日：2021-09-22

Applicant: QUALCOMM Incorporated

Inventor： Adarsh Krishnan Ramasubramonian ,  Geert Van der Auwera ,  Bappaditya Ray ,  Marta Karczewicz

IPC: H04N19/70 ,  H04N19/31 ,  H04N13/161

CPC classification number: H04N19/70 ,  H04N13/161 ,  H04N19/31

Abstract: Example devices and techniques are disclosed for incorporating temporal identification information in geometry point cloud compression syntax structures. An example device for decoding point cloud data includes memory configured to store the point cloud data and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to determine a value of a temporal identifier (ID) of a syntax structure and decode the point cloud data based on the value of the temporal ID. The temporal ID of the syntax structure identifies a temporal layer to which point cloud data associated with the syntax structure belongs.

公开(公告)号：US11729381B2

公开(公告)日：2023-08-15

申请号：US17122850

申请日：2020-12-15

Applicant: QUALCOMM Incorporated

Inventor： Nan Hu ,  Vadim Seregin ,  Marta Karczewicz

IPC: H04N19/117 ,  H04N19/157 ,  H04N19/46 ,  H04N19/80 ,  H04N19/86 ,  H04N19/96

CPC classification number: H04N19/117 ,  H04N19/157 ,  H04N19/46 ,  H04N19/80 ,  H04N19/86 ,  H04N19/96

Abstract: A video encoder may signal a set of values for one or more deblocking filter parameters at a high level parameter set. A video decoder may receive and decode the set of values. The video encoder may also encode an index to the set of values at a lower level. The video decoder may decode the index and then use the index to determine the particular value from the set of values to determine the deblocking filter parameter.

公开(公告)号：US11695960B2

公开(公告)日：2023-07-04

申请号：US16899063

申请日：2020-06-11

Applicant: QUALCOMM Incorporated

Inventor： Alican Nalci ,  Hilmi Enes Egilmez ,  Vadim Seregin ,  Muhammed Zeyd Coban ,  Marta Karczewicz

IPC: H04N19/645 ,  H04N19/18 ,  H04N19/124 ,  H04N19/70 ,  H04N19/186 ,  H04N19/176

CPC classification number: H04N19/645 ,  H04N19/124 ,  H04N19/176 ,  H04N19/18 ,  H04N19/186 ,  H04N19/70

Abstract: A video decoder determines, based on a block size of a current block and a low-frequency non-separable transform (LFNST) syntax element, a zero-out pattern of normatively defined zero-coefficients. The LFNST syntax element is signaled at a transform unit (TU) level. Additionally, the video decoder determines transform coefficients of the current block. The transform coefficients of the current block include transform coefficients in an LFNST region of the current block and transform coefficients outside the LFNST region of the current block. As part of determining the transform coefficients of the current block, the video decoder applies an inverse LFNST to determine values of one or more transform coefficients in the LFNST region of the current block. The video decoder also determines that transform coefficients of the current block in a region of the current block defined by the zero-out pattern are equal to 0.