公开(公告)号：US20130118564A1

公开(公告)日：2013-05-16

申请号：US13639731

申请日：2011-04-06

Applicant: Chin Li Cheung ,  Joseph R. Brewer

Inventor： Chin Li Cheung ,  Joseph R. Brewer

IPC: H01L31/0328 ,  H01L31/18

CPC classification number: H01L31/0328 ,  H01L21/0237 ,  H01L21/02491 ,  H01L21/02568 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/02581 ,  H01L21/0262 ,  H01L31/032 ,  H01L31/072 ,  H01L31/18 ,  H01L31/1828 ,  H01L51/4213 ,  Y02E10/50

Abstract: An apparatus that includes a photovoltaic cell is provided. The photovoltaic cell includes a p-type thin film having a first rare earth sulfide, and an n-type thin film having a second rare earth sulfide. A p-n junction is formed between the p-type thin film and the n-type thin film. The photovoltaic cell includes a substrate and an at least partially transparent layer. The p-type and n-type thin films are deposited between the substrate and the at least partially transparent layer.

Abstract translation: 提供了包括光伏电池的装置。 光伏电池包括具有第一稀土硫化物的p型薄膜和具有第二稀土硫化物的n型薄膜。 在p型薄膜和n型薄膜之间形成p-n结。 光伏电池包括衬底和至少部分透明的层。 p型和n型薄膜沉积在衬底和至少部分透明的层之间。

公开(公告)号：US08399879B2

公开(公告)日：2013-03-19

申请号：US12993880

申请日：2009-06-05

Applicant: Yongxun Liu ,  Takashi Matsukawa ,  Kazuhiko Endo ,  Shinichi Ouchi ,  Kunihiro Sakamoto ,  Meishoku Masahara

Inventor： Yongxun Liu ,  Takashi Matsukawa ,  Kazuhiko Endo ,  Shinichi Ouchi ,  Kunihiro Sakamoto ,  Meishoku Masahara

IPC: H01L29/06 ,  H01L31/072 ,  H01L31/019 ,  H01L31/0328 ,  H01L31/0336

CPC classification number: H01L29/0665 ,  B82Y10/00 ,  H01L29/045 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/78696

Abstract: Provided is a method for fabricating a nano-wire field effect transistor including steps of: preparing an SOI substrate having a (100) surface orientation, and nano-wire field effect transistor where two triangular columnar members configuring the nano-wires and being made of a silicon crystal layer are arranged one above the other on an SOI substrate having a (100) surface such a way that the ridge lines of the triangular columnar members face via an insulator; processing the silicon crystal configuring the SOI substrate into a standing plate-shaped member having a rectangular cross-section; and as a nanowire, processing the silicon crystal by orientation dependent wet etching into a shape where two triangular columnar members are arranged one above the other in such a way that the ridge lines of the triangular columnar members configuring the nano-wires face through the ridge lines thereof, and an integrated circuit including the nano-wire field effect transistor.

Abstract translation: 提供一种制造纳米线场效应晶体管的方法，包括以下步骤：制备具有（100）表面取向的SOI衬底和纳米线场效应晶体管，其中构成纳米线的两个三角柱形构件由 在具有（100）表面的SOI衬底上，使三角柱状构件的棱线经由绝缘体面对，从而将硅晶体层彼此重叠地布置; 将构成SOI衬底的硅晶体加工成具有矩形横截面的立式板状构件; 并且作为纳米线，通过取向相关的湿法蚀刻将硅晶体加工成两个三角柱形部件一个在另一个上方布置的形状，使得构成纳米线的三角柱形部件的脊线面向通过脊 线，以及包括纳米线场效应晶体管的集成电路。

公开(公告)号：US08384130B2

公开(公告)日：2013-02-26

申请号：US13137291

申请日：2011-08-03

Applicant: Woo Chul Jeon ,  Ki Yeol Park ,  Young Hwan Park

Inventor： Woo Chul Jeon ,  Ki Yeol Park ,  Young Hwan Park

IPC: H01L29/739 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC classification number: H01L29/66431 ,  H01L29/2003 ,  H01L29/404 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7787

Abstract: Provided is a nitride semiconductor device including: a nitride semiconductor layer over a substrate wherein the nitride semiconductor has a two-dimensional electron gas (2DEG) channel inside; a drain electrode in ohmic contact with the nitride semiconductor layer; a source electrode spaced apart from the drain electrode, in Schottky contact with the nitride semiconductor layer, and having an ohmic pattern in ohmic contact with the nitride semiconductor layer inside; a dielectric layer formed on the nitride semiconductor layer between the drain electrode and the source electrode and on at least a portion of the source electrode; and a gate electrode disposed on the dielectric layer to be spaced apart from the drain electrode, wherein a portion of the gate electrode is formed over a drain-side edge portion of the source electrode with the dielectric layer interposed therebetween, and a manufacturing method thereof.

Abstract translation: 提供一种氮化物半导体器件，其包括：氮化物半导体层，其在氮化物半导体内部具有二维电子气体（2DEG）通道的衬底上; 与氮化物半导体层欧姆接触的漏电极; 源极与漏极间隔开，与氮化物半导体层肖特基接触，并且具有与内部的氮化物半导体层欧姆接触的欧姆图案; 形成在所述氮化物半导体层上的所述漏电极和所述源电极之间以及所述源电极的至少一部分上的电介质层; 以及设置在所述电介质层上以与所述漏极间隔开的栅电极，其中所述栅电极的一部分形成在所述源电极的漏极侧边缘部分之间，并且介电层插入其间;以及其制造方法 。

公开(公告)号：US08350275B2

公开(公告)日：2013-01-08

申请号：US13078180

申请日：2011-04-01

Applicant: Min Yan ,  James Edward Pickett ,  Rebecca Suzanne Northey

Inventor： Min Yan ,  James Edward Pickett ,  Rebecca Suzanne Northey

IPC: H01L27/15 ,  H01L29/26 ,  H01L31/12 ,  H01L33/00 ,  H01L29/22 ,  H01L29/06 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC classification number: H01L33/56 ,  C08K5/3475 ,  C08K5/3492 ,  C09D7/48 ,  H01L31/048 ,  H01L2924/0002 ,  Y02E10/52 ,  H01L2924/00

Abstract: An optoelectronic device assembly can include: a coated element and an electroactive cell on the coated element, wherein the electroactive cell is selected from the group consisting of a light emitting diode and a photovoltaic cell. The coated element can include: transparent thermoplastic substrate and a protective weathering layer. The transparent thermoplastic substrate can include a material selected from the group consisting of aromatic polycarbonate and polyester, and combinations including at least one of the foregoing materials. The protective weathering layer can have a UV absorbance loss rate at 330 nm of less than or equal to 0.15 A/year as estimated from filtered xenon arc exposure and/or having a rate of erosion of less than or equal to 5 μm per year as estimated from filtered xenon arc exposure.

Abstract translation: 光电子器件组件可以包括：涂覆元件和涂覆元件上的电活性电池，其中电活性电池选自发光二极管和光伏电池。 涂覆的元件可以包括：透明热塑性基材和保护性耐候层。 透明热塑性基材可以包括选自芳族聚碳酸酯和聚酯的材料，以及包括至少一种前述材料的组合。 保护性风化层可以在330nm下的紫外吸收损失率小于或等于0.15A /年，从过滤的氙弧暴露估计和/或每年的侵蚀速率小于或等于5微米 从过滤的氙弧曝光估计。

公开(公告)号：US08258498B2

公开(公告)日：2012-09-04

申请号：US13017862

申请日：2011-01-31

Applicant: Prashant Majhi ,  Mantu Hudait ,  Jack T. Kavalieros ,  Ravi Pillarisetty ,  Marko Radosavljevic ,  Gilbert Dewey ,  Titash Rakshit ,  Willman Tsai

Inventor： Prashant Majhi ,  Mantu Hudait ,  Jack T. Kavalieros ,  Ravi Pillarisetty ,  Marko Radosavljevic ,  Gilbert Dewey ,  Titash Rakshit ,  Willman Tsai

IPC: H01L29/06 ,  H01L31/072 ,  H01L31/0336 ,  H01L31/0328 ,  H01L31/109

CPC classification number: H01L29/66431 ,  H01L21/28518 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76897 ,  H01L29/152 ,  H01L29/165 ,  H01L29/41766 ,  H01L29/517 ,  H01L29/66462 ,  H01L29/7783 ,  H01L29/7848 ,  H01L29/802

Abstract: Embodiments described include straining transistor quantum well (QW) channel regions with metal source/drains, and conformal regrowth source/drains to impart a uni-axial strain in a MOS channel region. Removed portions of a channel layer may be filled with a junction material having a lattice spacing different than that of the channel material to causes a uni-axial strain in the channel, in addition to a bi-axial strain caused in the channel layer by a top barrier layer and a bottom buffer layer of the quantum well.

Abstract translation: 所描述的实施例包括具有金属源/漏极的应变晶体管量子阱（QW）沟道区，以及保形再生长源/漏极，以在MOS沟道区中赋予单轴应变。 沟道层的去除部分可以填充具有不同于沟道材料的晶格间隔的结合材料，以在通道中引起单轴应变，以及在沟道层中引起的双轴应变 顶部阻挡层和量子阱的底部缓冲层。

公开(公告)号：US08217402B2

公开(公告)日：2012-07-10

申请号：US12840532

申请日：2010-07-21

Applicant: Nikolay I. Nemchuk

Inventor： Nikolay I. Nemchuk

IPC: H01L27/15 ,  H01L29/26 ,  H01L31/12 ,  H01L33/00 ,  H01L29/06 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109 ,  H01L29/22

CPC classification number: H01L33/508

Abstract: Light-emitting devices and associated methods are provided. The light emitting devices can have a wavelength converting material-coated emission surface.

Abstract translation: 提供发光器件和相关方法。 发光器件可以具有波长转换材料涂覆的发射表面。

公开(公告)号：US08212292B2

公开(公告)日：2012-07-03

申请号：US12622625

申请日：2009-11-20

Applicant: Xin Lin ,  Daniel J. Blomberg ,  Jiang-Kia Zuo

Inventor： Xin Lin ,  Daniel J. Blomberg ,  Jiang-Kia Zuo

IPC: H01L31/0328

CPC classification number: H01L29/66272 ,  H01L21/8249 ,  H01L27/0623 ,  H01L29/0804 ,  H01L29/1004 ,  H01L29/7322

Abstract: An improved bipolar transistor (40, 40′) is provided, manufacturable by a CMOS IC process without added steps. The improved transistor (40, 40′) comprises an emitter (48) having first (482) and second (484) portions of different depths (4821, 4841), a base (46) underlying the emitter (48) having a central portion (462) of a first base width (4623) underlying the first portion (482) of the emitter (48), a peripheral portion (464) having a second base width (4643) larger than the first base width (4623) partly underlying the second portion (484) of the emitter (48), and a transition zone (466) of a third base width (4644) and lateral extent (4661) lying laterally between the first (462) and second (464) portions of the base (46), and a collector (44) underlying the base (46). The gain of the transistor (40, 40′) is much larger than a conventional bipolar transistor (20) made using the same CMOS process. By adjusting the lateral extent (4661) of the transition zone (466), the properties of the improved transistor (40, 40′) can be tailored to suit different applications without modifying the underlying CMOS IC process.

Abstract translation: 提供改进的双极晶体管（40,40'），可通过CMOS IC工艺制造而无需附加步骤。 改进的晶体管（40,40'）包括具有不同深度（4821,4481）的第一（482）和第二（484）部分的发射器（48），位于发射器（48）下方的基座（46）具有中心部分 （462）位于发射器（48）的第一部分（482）下方的第一基底宽度（4623）的外围部分（462），具有大于第一基部宽度（4623）的第二基底宽度（4643）的周边部分（464） 发射器（48）的第二部分（484）和位于第一（462）和第二（464）部分之间的侧向位于第三基部宽度（4644）和横向范围（4661）的过渡区（466） 基部（46）和底部（46）下方的收集器（44）。 晶体管（40,40'）的增益比使用相同CMOS工艺制造的传统双极晶体管（20）大得多。 通过调整过渡区域（466）的横向范围（4661），改进的晶体管（40,40'）的特性可以被调整以适应不同的应用而不修改底层的CMOS IC工艺。

公开(公告)号：US08207556B2

公开(公告)日：2012-06-26

申请号：US13243516

申请日：2011-09-23

Applicant: Takashi Kyono ,  Yusuke Yoshizumi ,  Yohei Enya ,  Katsushi Akita ,  Masaki Ueno ,  Takamichi Sumitomo ,  Takao Nakamura

Inventor： Takashi Kyono ,  Yusuke Yoshizumi ,  Yohei Enya ,  Katsushi Akita ,  Masaki Ueno ,  Takamichi Sumitomo ,  Takao Nakamura

IPC: H01L29/24 ,  H01L33/00 ,  H01L29/06 ,  H01L29/12 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109 ,  H01L29/22 ,  H01L29/732 ,  H01L29/739

CPC classification number: H01L21/02389 ,  B82Y20/00 ,  H01L21/02433 ,  H01L21/02458 ,  H01L21/02491 ,  H01L21/0254 ,  H01L21/02573 ,  H01L21/0262 ,  H01L33/16 ,  H01L33/32 ,  H01S5/305 ,  H01S5/3086 ,  H01S5/3202 ,  H01S5/3211 ,  H01S5/34333 ,  H01S2304/04

Abstract: A group III nitride semiconductor device having a gallium nitride based semiconductor film with an excellent surface morphology is provided. A group III nitride optical semiconductor device includes a group III nitride semiconductor supporting base, a GaN based semiconductor region, an active layer, and a GaN semiconductor region. The primary surface of the group III nitride semiconductor supporting base is not any polar plane, and forms a finite angle with a reference plane that is orthogonal to a reference axis extending in the direction of a c-axis of the group III nitride semiconductor. The GaN based semiconductor region, grown on the semipolar primary surface, includes a semiconductor layer of, for example, an n-type GaN based semiconductor doped with silicon. A GaN based semiconductor layer of an oxygen concentration of 5×1016 cm−3 or more provides an active layer, grown on the primary surface, with an excellent crystal quality.

Abstract translation: 提供具有优异表面形态的具有氮化镓基半导体膜的III族氮化物半导体器件。 III族氮化物光半导体器件包括III族氮化物半导体支撑基底，GaN基半导体区域，有源层和GaN半导体区域。 III族氮化物半导体支撑基体的主表面不是任何极性平面，并且与与在III族氮化物半导体的c轴方向上延伸的参考轴正交的参考平面形成有限角度。 在半极性主表面上生长的GaN基半导体区域包括例如掺杂有硅的n型GaN基半导体的半导体层。 氧浓度为5×1016cm-3以上的GaN系半导体层能够提供在主表面生长的活性层，其结晶质量优异。

公开(公告)号：US08188459B2

公开(公告)日：2012-05-29

申请号：US12577892

申请日：2009-10-13

Applicant: Tomas Palacios ,  Jinwook Chung

Inventor： Tomas Palacios ,  Jinwook Chung

IPC: H01L29/06 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC classification number: H01L29/66462 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/267 ,  H01L29/41766 ,  H01L29/7783 ,  H01L29/7787

Abstract: A nitride-based semiconductor device is provided. The nitride-base semiconductor device includes a substrate comprising one or more locally etched regions and a buffer layer comprising one or multiple InAlGaN layers on the substrate. A channel layer includes GaN on the buffer layer. A barrier layer includes one or multiple AlGaN layers on the channel layer.

Abstract translation: 提供了一种氮化物基半导体器件。 氮化物基半导体器件包括包括一个或多个局部蚀刻区域的衬底和在衬底上包括一个或多个InAlGaN层的缓冲层。 沟道层在缓冲层上包括GaN。 阻挡层包括沟道层上的一个或多个AlGaN层。

公开(公告)号：US08168965B2

公开(公告)日：2012-05-01

申请号：US11063265

申请日：2005-02-22

Applicant: Andrew Gabriel Rinzler ,  Stephen J. Pearton

Inventor： Andrew Gabriel Rinzler ,  Stephen J. Pearton

IPC: H01L29/06 ,  H01L31/072 ,  H01L31/0328

CPC classification number: H01L33/40 ,  B82Y10/00 ,  H01L21/28506 ,  H01L33/14 ,  H01L33/16 ,  H01L33/32 ,  Y10S977/70 ,  Y10S977/773

Abstract: A semiconductor device includes at least one semiconductor layer, a metal layer in electrical contact with the semiconductor layer, and a carbon nanotube contact layer interposed between the metal layer and the semiconductor layer. The contact layer electrically couples the metal layer to the semiconductor layer and provides a semiconductor contact having low specific contact resistance. The contact layer can be substantially optically transparent layer in at least a portion of the visible light range.

Abstract translation: 半导体器件包括至少一个半导体层，与该半导体层电接触的金属层以及置于该金属层与该半导体层之间的碳纳米管接触层。 接触层将金属层电耦合到半导体层，并提供具有低比接触电阻的半导体接触。 接触层可以是可见光范围的至少一部分中的基本上光学透明的层。