公开(公告)号：US20170229327A1

公开(公告)日：2017-08-10

申请号：US15497992

申请日：2017-04-26

Applicant: Lam Research Corporation

Inventor： Harmeet Singh ,  Keith Gaff ,  Neil Benjamin ,  Keith Comendant

IPC: H01L21/67 ,  H01J37/32 ,  C23C4/10 ,  C23C4/134 ,  C23C14/50 ,  C23C16/509 ,  C23C14/34 ,  C23C14/10 ,  C23C16/40 ,  C23C16/458 ,  C23C16/46 ,  H01L21/683 ,  C23C14/54

CPC classification number: H01L21/67103 ,  C23C4/10 ,  C23C4/134 ,  C23C14/10 ,  C23C14/34 ,  C23C14/50 ,  C23C14/541 ,  C23C16/401 ,  C23C16/4586 ,  C23C16/46 ,  C23C16/509 ,  H01J37/32082 ,  H01J37/32091 ,  H01J37/32449 ,  H01J37/32724 ,  H01J2237/327 ,  H01J2237/332 ,  H01J2237/3321 ,  H01J2237/3323 ,  H01J2237/334 ,  H01J2237/3342 ,  H01J2237/3343 ,  H01L21/02274 ,  H01L21/0262 ,  H01L21/28556 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136 ,  H01L21/67109 ,  H01L21/67248 ,  H01L21/6831 ,  H01L21/6833 ,  H05B1/0233 ,  H05B3/00 ,  H05B3/26 ,  Y10T29/49083 ,  Y10T29/49099

Abstract: A substrate support is provided, is configured to support a substrate in a plasma processing chamber, and includes first, second and third insulative layers, conduits and leads. The first insulative layer includes heater zones arranged in rows and columns. The second insulative layer includes conductive vias. First ends of the conductive vias are connected respectively to the heater zones. Second ends of the conductive vias are connected respectively to power supply lines. The third insulative layer includes power return lines. The conduits extend through the second insulative layer and into the third insulative layer. The leads extend through the conduits and connect to the heater zones. The heater zones are connected to the power return lines by the leads and are configured to heat corresponding portions of the substrate to provide a predetermined temperature profile across the substrate during processing of the substrate in the plasma processing chamber.

公开(公告)号：US09646861B2

公开(公告)日：2017-05-09

申请号：US14056604

申请日：2013-10-17

Applicant: Lam Research Corporation

Inventor： Harmeet Singh ,  Keith Gaff ,  Neil Benjamin ,  Keith Comendant

IPC: H05B1/02 ,  H01L21/67 ,  C23C14/54 ,  C23C16/458 ,  H01L21/683 ,  H01L21/3065 ,  H05B3/26 ,  H05B3/00 ,  C23C14/50 ,  C23C16/46 ,  C23C16/509 ,  H01J37/32 ,  H01L21/02 ,  H01L21/285 ,  H01L21/311 ,  H01L21/3213

CPC classification number: H01L21/67103 ,  C23C14/50 ,  C23C14/541 ,  C23C16/4586 ,  C23C16/46 ,  C23C16/509 ,  H01J37/32091 ,  H01J37/32724 ,  H01J2237/327 ,  H01J2237/332 ,  H01J2237/3321 ,  H01J2237/3323 ,  H01J2237/334 ,  H01J2237/3342 ,  H01J2237/3343 ,  H01L21/02274 ,  H01L21/0262 ,  H01L21/28556 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136 ,  H01L21/67109 ,  H01L21/67248 ,  H01L21/6831 ,  H05B1/0233 ,  H05B3/00 ,  H05B3/26 ,  Y10T29/49083 ,  Y10T29/49099

Abstract: A heating plate for use in a substrate support is configured to provide temperature profile control of a substrate supported on the substrate support in a vacuum chamber of a substrate processing apparatus. The heating plate includes an independently controllable heater zones operable to tune a temperature profile on an upper surface of the heating plate. The heater zones are each powered by two or more power lines wherein each power line is electrically connected to a different group of the heater zones and each respective heater zone is electrically connected to a different pair of power lines.

公开(公告)号：US20170125272A1

公开(公告)日：2017-05-04

申请号：US15285843

申请日：2016-10-05

Applicant: Lam Research Corporation

Inventor： James Stephen van Gogh ,  Candi Kristoffersen ,  Mohsen Salek ,  Brandon Senn ,  Harmeet Singh ,  Derek John Witkowicki ,  Richard M. Blank ,  Richard Howard Gould ,  Efrain Quiles

IPC: H01L21/673 ,  H01L21/677 ,  H01L21/67 ,  H01L21/687

Abstract: Systems and techniques for forming buffer gas microclimates around semiconductor wafers in environments external to a semiconductor processing chamber are disclosed. Such systems may include slot doors that may allow for single wafers to be removed from a multi-wafer stack while limiting outflow of buffer gas from a multi-wafer storage system, as well as buffer gas distributors that move in tandem with robot arms used to transport wafers for at least some of the movements of such robot arms.

公开(公告)号：US09589853B2

公开(公告)日：2017-03-07

申请号：US14337953

申请日：2014-07-22

Applicant: Lam Research Corporation

Inventor： Monica Titus ,  Gowri Kamarthy ,  Harmeet Singh ,  Yoshie Kimura ,  Meihua Shen ,  Baosuo Zhou ,  Yifeng Zhou ,  John Hoang

IPC: H01L21/00 ,  H01L21/3065 ,  H01L21/66 ,  H01L21/67 ,  H01L21/311

CPC classification number: H01L22/12 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/67103 ,  H01L22/20

Abstract: A method of planarizing an upper surface of a semiconductor substrate in a plasma etch chamber comprises supporting the substrate on a support surface of a substrate support assembly that includes an array of independently controlled thermal control elements therein which are operable to control the spatial and temporal temperature of the support surface of the substrate support assembly to form independently controllable heater zones which are formed to correspond to a desired temperature profile across the upper surface of the semiconductor substrate. The etch rate across the upper surface of the semiconductor substrate during plasma etching depends on a localized temperature thereof wherein the desired temperature profile is determined such that the upper surface of the semiconductor substrate is planarized within a predetermined time. The substrate is plasma etched for the predetermined time thereby planarizing the upper surface of the substrate.

Abstract translation: 在等离子体蚀刻室中平坦化半导体衬底的上表面的方法包括将衬底支撑在衬底支撑组件的支撑表面上，该衬底支撑组件包括其中独立控制的热控元件的阵列，其可操作以控制空间和时间温度 的基板支撑组件的支撑表面以形成独立可控的加热器区域，其形成为对应于横跨半导体基板的上表面的期望温度分布。 在等离子体蚀刻期间跨越半导体衬底的上表面的蚀刻速率取决于其局部温度，其中确定期望的温度分布，使得半导体衬底的上表面在预定时间内被平坦化。 将衬底等离子体蚀刻预定时间，从而平坦化衬底的上表面。

公开(公告)号：US09576811B2

公开(公告)日：2017-02-21

申请号：US14696254

申请日：2015-04-24

Applicant: Lam Research Corporation

Inventor： Keren Jacobs Kanarik ,  Jeffrey Marks ,  Harmeet Singh ,  Samantha Tan ,  Alexander Kabansky ,  Wenbing Yang ,  Taeseung Kim ,  Dennis M. Hausmann ,  Thorsten Lill

IPC: H01L21/3065 ,  H01L21/311 ,  H01L21/02 ,  H01L21/67 ,  H01L21/683

CPC classification number: H01L21/30655 ,  C23C16/45527 ,  C23C16/45544 ,  H01J37/32009 ,  H01J37/32449 ,  H01J2237/334 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31116 ,  H01L21/32137 ,  H01L21/67069 ,  H01L21/67207 ,  H01L21/6831 ,  H01L43/12

Abstract: Methods are provided for integrating atomic layer etch and atomic layer deposition by performing both processes in the same chamber or reactor. Methods involve sequentially alternating between atomic layer etch and atomic layer deposition processes to prevent feature degradation during etch, improve selectivity, and encapsulate sensitive layers of a semiconductor substrate.

Abstract translation: 提供了通过在相同的室或反应器中进行两种方法来整合原子层蚀刻和原子层沉积的方法。 方法涉及在原子层蚀刻和原子层沉积工艺之间顺序交替以防止蚀刻期间的特征劣化，提高选择性，并且封装半导体衬底的敏感层。

公开(公告)号：US20160300741A1

公开(公告)日：2016-10-13

申请号：US15183260

申请日：2016-06-15

Applicant: Lam Research Corporation

Inventor： Harmeet Singh ,  Keith Gaff ,  Neil Benjamin ,  Keith Comendant

IPC: H01L21/67 ,  H01J37/32 ,  H01L21/683

CPC classification number: H01L21/67103 ,  C23C4/10 ,  C23C4/134 ,  C23C14/10 ,  C23C14/34 ,  C23C14/50 ,  C23C14/541 ,  C23C16/401 ,  C23C16/4586 ,  C23C16/46 ,  C23C16/509 ,  H01J37/32082 ,  H01J37/32091 ,  H01J37/32449 ,  H01J37/32724 ,  H01J2237/327 ,  H01J2237/332 ,  H01J2237/3321 ,  H01J2237/3323 ,  H01J2237/334 ,  H01J2237/3342 ,  H01J2237/3343 ,  H01L21/02274 ,  H01L21/0262 ,  H01L21/28556 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136 ,  H01L21/67109 ,  H01L21/67248 ,  H01L21/6831 ,  H01L21/6833 ,  H05B1/0233 ,  H05B3/00 ,  H05B3/26 ,  Y10T29/49083 ,  Y10T29/49099

Abstract: A substrate support in a semiconductor plasma processing apparatus, comprises multiple independently controllable thermal zones arranged in a scalable multiplexing layout, and electronics to independently control and power the thermal zones. A substrate support in which the substrate support is incorporated includes an electrostatic clamping electrode and a temperature controlled base plate. Methods for manufacturing the substrate support include bonding together ceramic or polymer sheets having thermal zones, power supply lines, power return lines and vias.

Abstract translation: 半导体等离子体处理装置中的衬底支撑件包括以可伸缩多路复用布局布置的多个可独立控制的热区，以及用于独立地控制和加热热区的电子装置。 其中结合衬底支撑件的衬底支撑件包括静电夹持电极和温度控制的底板。 用于制造衬底支撑体的方法包括将具有热区，电源线，功率返回线和通孔的陶瓷或聚合物片粘合在一起。

公开(公告)号：US20160204007A1

公开(公告)日：2016-07-14

申请号：US15076573

申请日：2016-03-21

Applicant: Lam Research Corporation

Inventor： Rajinder Dhindsa ,  Harmeet Singh ,  Sang Ki Nam

IPC: H01L21/67 ,  H01L21/3065

CPC classification number: H01L21/67069 ,  H01J37/32091 ,  H01J37/32449 ,  H01J37/32816 ,  H01L21/3065

Abstract: A method for modulating a pressure in a plasma processing volume of a chamber during a plasma processing operation is disclosed. The plasma processing volume is defined between a surface of a top electrode, a supporting surface of a substrate support and an outer region defined by a plasma confinement structure that encloses an outer perimeter of the plasma processing volume. The plasma confinement structure includes a plurality of equally distributed openings out of the plasma processing volume. The method includes supplying process gases to the processing volume during the plasma processing operation and supplying radio frequency (RF) power to the chamber to produce a plasma using the process gases and to produce gas byproducts. The method further includes controlling a position of a conductance control structure relative to the plasma confinement structure. During a first period of time of the plasma processing operation, the position of the conductance control structure is moved to increase a restriction the produced gas byproducts that flow out of the process volume through the plasma confinement structure. During a second period of time of the plasma processing operation, the position of the conductance control structure is moved to decrease a restriction the produced gas byproducts that flow out of the process volume through the plasma confinement structure. The movement of the conductance control structure functions to module the pressure during the plasma processing operation.

Abstract translation: 公开了一种用于在等离子体处理操作期间调制室的等离子体处理体积中的压力的​​方法。 等离子体处理体积限定在顶部电极的表面，衬底支撑件的支撑表面和由包围等离子体处理体积的外周边的等离子体限制结构限定的外部区域之间。 等离子体约束结构包括离开等离子体处理体积的多个均匀分布的开口。 该方法包括在等离子体处理操作期间向处理体积提供处理气体，并且向室提供射频（RF）功率以使用该工艺气体产生等离子体并产生气体副产物。 该方法还包括控制电导控制结构相对于等离子体限制结构的位置。 在等离子体处理操作的第一时间段期间，移动电导控制结构的位置以增加通过等离子体限制结构流出处理体积的产生的气体副产物的限制。 在等离子体处理操作的第二时间段期间，移动电导控制结构的位置以减少通过等离子体限制结构流出处理体积的产生的气体副产物的限制。 电导控制结构的运动用于在等离子体处理操作期间模块化压力。

公开(公告)号：US09390893B2

公开(公告)日：2016-07-12

申请号：US14466724

申请日：2014-08-22

Applicant: Lam Research Corporation

Inventor： John C. Valcore, Jr. ,  Harmeet Singh ,  Bradford J. Lyndaker

IPC: H01J37/32 ,  H03L7/00 ,  H05H1/46

CPC classification number: H01J37/32146 ,  H01J37/32082 ,  H01J37/32174 ,  H01J37/32183 ,  H01J37/3244 ,  H01J37/3255 ,  H01J2237/327 ,  H03K3/01 ,  H03L7/00 ,  H03L7/06 ,  H05H2001/4682

Abstract: A method for achieving sub-pulsing during a state is described. The method includes receiving a clock signal from a clock source, the clock signal having two states and generating a pulsed signal from the clock signal. The pulsed signal has sub-states within one of the states. The sub-states alternate with respect to each other at a frequency greater than a frequency of the states. The method includes providing the pulsed signal to control power of a radio frequency (RF) signal that is generated by an RF generator. The power is controlled to be synchronous with the pulsed signal.

Abstract translation: 描述了在一个状态下实现子脉冲的方法。 该方法包括从时钟源接收时钟信号，时钟信号具有两个状态，并从时钟信号产生脉冲信号。 脉冲信号在状态之一内具有子状态。 子状态相对于彼此以大于状态频率的频率交替。 该方法包括提供脉冲信号以控制由RF发生器产生的射频（RF）信号的功率。 功率被控制为与脉冲信号同步。

公开(公告)号：US09257295B2

公开(公告)日：2016-02-09

申请号：US14637260

申请日：2015-03-03

Applicant: LAM Research Corporation

Inventor： Harmeet Singh ,  Alex Paterson

IPC: H01L21/3065 ,  H01L21/67 ,  H01J37/32 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/02 ,  H01L43/12

CPC classification number: H01L21/67213 ,  H01J37/32 ,  H01J37/32422 ,  H01J37/3244 ,  H01J37/32458 ,  H01J37/32623 ,  H01J2237/327 ,  H01J2237/3341 ,  H01L21/02057 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/32136 ,  H01L21/67069 ,  H01L43/12

Abstract: The disclosed embodiments relate to methods and apparatus for removing material from a substrate. In various implementations, conductive material is removed from a sidewall of a previously etched feature such as a trench, hole or pillar on a semiconductor substrate. In practicing the techniques herein, a substrate is provided in a reaction chamber that is divided into an upper plasma generation chamber and a lower processing chamber by a corrugated ion extractor plate with apertures therethrough. The extractor plate is corrugated such that the plasma sheath follows the shape of the extractor plate, such that ions enter the lower processing chamber at an angle relative to the substrate. As such, during processing, ions are able to penetrate into previously etched features and strike the substrate on the sidewalls of such features. Through this mechanism, the material on the sidewalls of the features may be removed.

公开(公告)号：US20150364388A1

公开(公告)日：2015-12-17

申请号：US14307062

申请日：2014-06-17

Applicant: Lam Research Corporation

Inventor： Ole Waldmann ,  Eric A. Pape ,  Keith William Gaff ,  Harmeet Singh

IPC: H01L21/66

CPC classification number: H01L21/67109 ,  H01L21/67248 ,  H01L21/67288

Abstract: A method for auto-correction of at least one malfunctioning thermal control element among an array of thermal control elements that are independently controllable and located in a temperature control plate of a substrate support assembly which supports a semiconductor substrate during processing thereof, the method including: detecting, by a control unit including a processor, that at least one thermal control element of the array of thermal control elements is malfunctioning; deactivating, by the control unit, the at least one malfunctioning thermal control element; and modifying, by the control unit, a power level of at least one functioning thermal control element in the temperature control plate to minimize impact of the malfunctioning thermal control element on the desired temperature output at the location of the at least one malfunctioning thermal control element.

Abstract translation: 一种用于自动校正热控制元件阵列中的至少一个故障热控元件的方法，所述热控制元件阵列可独立控制并位于在其处理期间支撑半导体衬底的衬底支撑组件的温度控制板中，所述方法包括： 通过包括处理器的控制单元检测所述热控元件阵列中的至少一个热控元件是故障的; 由所述控制单元使所述至少一个故障热控制元件停用; 以及通过所述控制单元修改所述温度控制板中的至少一个功能性热控制元件的功率水平，以使所述故障热控制元件对所述至少一个故障热控制元件的位置处的所需温度输出的影响最小化 。