-
公开(公告)号：US11361800B2
公开(公告)日：2022-06-14
申请号：US16633328
申请日：2018-01-16
申请人： RACYICS GMBH
IPC分类号： G11C5/14 , G05F3/20 , G01R31/317 , G06F11/30 , G06F11/34 , G06F30/20 , G06F30/3312 , G06F30/398 , G06F30/39 , G06F30/337 , G06F30/30 , G01R31/28 , H03K3/03 , G05F1/00 , G06F119/08 , G06F119/06 , G06F119/12 , G06F30/3308
摘要： A method for an improved characterization of standard cells in a circuit design process is disclosed. Adaptive body biasing is considered during the design process by using simulation results of a cell set, a data-set for performance of the cell set, and a data-set for a hardware performance for a slow, typical and fast circuit property. Static deviations in a supply voltage are considered by determining a reference performance of a cell and a reference hardware performance monitor value at a PVT corner. A virtual regulation and adapting of body bias voltages of the cell set is performed such that the reference performance of the cell or the reference hardware performance monitor value will be reached at each PVT corner and for compensating the static deviation in the supply voltage. The results are provided in a library file.
-
公开(公告)号：US11326917B2
公开(公告)日：2022-05-10
申请号：US16537842
申请日：2019-08-12
申请人： Rohm Co., Ltd.
发明人： Isao Niwa , Yuji Kaneda , Yuzo Mizushima
IPC分类号： G01F1/667 , H01L23/495 , H03K5/24 , H03F3/68 , H03F3/45 , H03K3/03 , H01L23/00 , H03B5/36 , H03B5/24
摘要： A semiconductor integrated circuit device includes a first terminal arranged to accept an external input of an analog input signal, an amplifier configured to amplify the analog input signal to generate an amplified signal, a logic unit configured to generate a digital output signal that is in accordance with the amplified signal, and a second terminal arranged to externally output an analog output signal that is in accordance with the amplified signal. The first terminal is disposed at a first side of a package, and the second terminal is disposed at a second side which is different from the first side.
-
公开(公告)号：US20220130440A1
公开(公告)日：2022-04-28
申请号：US17448891
申请日：2021-09-26
发明人： Kai TIAN , Yuxia WANG
摘要： A memory includes: a clock generation circuit, configured to generate a first oscillation signal and a second oscillation signal. The first oscillation signal and the second oscillation signal have a same frequency but opposite phases, and a duty cycle of the first oscillation signal and a duty cycle of the second oscillation signal are both within a first preset range. The memory further includes a differential input circuit, which is configured to receive a first external signal and a second external signal, and generate a first internal signal and a second internal signal. The clock generation circuit is configured to monitor the duty cycle of the first internal signal or the duty cycle of the second internal signal, and enable the duty cycle of the first internal signal or the duty cycle of the second internal signal to be within a second preset range.
-
公开(公告)号：US11303808B2
公开(公告)日：2022-04-12
申请号：US16987320
申请日：2020-08-06
申请人： Robert Bosch GmbH
IPC分类号： H04N5/232 , H02M3/07 , H01L27/146 , H03K3/03
摘要： A sensor system includes a pixel array, a DC/DC converter, and a photodiode stack. The pixel array is configured to operate in an image capturing mode or an energy harvesting mode. The DC/DC converter is configured to convert energy captured by the pixel array while in energy harvesting mode. The photodiode stack is located adjacent to the pixel array and configured to provide power to the DC/DC converter.
-
55.发明申请公开(公告)号：US20220109436A1
公开(公告)日：2022-04-07
申请号：US17369562
申请日：2021-07-07
发明人： FU-SHENG HSU
摘要： A propagation delay balance circuit includes a signal generating circuit, a path switching element, and a signal change detecting element. The signal generating circuit includes delay chains for outputting delay signals respectively. The path switching element has input terminals and output terminals. Each output terminal of the path switching element is electrically connected to the input terminal of each delay chain one-to-one, and input terminals of the path switching element are electrically connected one-to-one to the output terminals of the delay chains. The path switching element is controlled by the path switching controlling signal to change the one-to-one internal electrical connection between input terminals and output terminals of the path switching element. The signal change detecting element is electrically connected to the path switching element, and generates a path switching controlling signal according to delay signals of the path switching element.
-
公开(公告)号：US11296712B2
公开(公告)日：2022-04-05
申请号：US17215862
申请日：2021-03-29
发明人： Eitan Rosen , Oded Norman
摘要： A circuit and corresponding method control cycle time of an output clock used to clock at least one other circuit. The circuit comprises an agile ring oscillator (ARO) and ARO controller. The ARO includes at least one instance of a first ring oscillator (RO) and second RO that generate high and low phases, respectively, of cycles of the output clock. The ARO controller controls durations of the high and low phases, independently, via first and second control words output to the ARO, respectively. In a present cycle of the output clock, the ARO controller effects a change to the high or low phase, or a combination thereof, in a next cycle of the output clock by updating the first or second control word, or a combination thereof, based on an indication of expected usage of the at least one other circuit in the next cycle. The change improves a performance-to-power ratio of the at least one other circuit.
-
公开(公告)号：US11293891B2
公开(公告)日：2022-04-05
申请号：US16143897
申请日：2018-09-27
IPC分类号： G01N27/327 , G01N33/487 , G01N27/00 , H03K3/03 , G01N27/414 , G01N33/497 , H03K3/0231 , H03M1/60 , B82Y15/00
摘要： Embodiments of the present disclosure relate to various methods and example systems for carrying out analog-to-digital conversion of data acquired by arrays of nanogap sensors. The nanogap sensors described herein may operate as molecular sensors to help identify chemical species through electrical measurements using at least a pair of electrodes separated by a nanogap. In general, the methods and systems proposed herein rely on digitizing the signal as the signal is being integrated, and then integrating the digitized results. With such methods, the higher sample rate used in the digitizer reduces the charge per quantization and, therefore, the size of sampling capacitors used. Consequently, sampling capacitors may be made factors of magnitude smaller, requiring less valuable space on a chip compared to sampling capacitors used in conventional nanogap sensor arrays.
-
公开(公告)号：US11283430B2
公开(公告)日：2022-03-22
申请号：US16916473
申请日：2020-06-30
发明人： Jinyuan Wu
摘要： A pure digital ring oscillator with constant power consumption as oscillation frequency is adjusted. Circuit topology includes a multiplexer implemented in NAND gates and a delay element positioned after a path selection NAND gate of that multiplexer such that delay element transistors may not toggle if the non-delaying signal path is selected. Assuming a delay element oscillation frequency f and a total capacitance C, and also assuming a plurality N of delay gates each characterized by a propagation delay t1 and a capacitance C1 such that C=C1*N, the ring oscillator of the present invention is characterized by a C value that is proportional to N and an f value that is inversely proportional to N. Furthermore, each of the N delay gates as well as the input and output gates of the multiplexer are characterized by a common capacitance-to-propagation delay ratio=C1/t1.
-
公开(公告)号：US11283402B2
公开(公告)日：2022-03-22
申请号：US17115445
申请日：2020-12-08
发明人： Ping-Han Tsai , Chih-Sheng Hou , Po-Yu Chen , Nan-Hsin Tseng
摘要： A device includes a sensor configured to provide a temperature-sensitive voltage and an oscillator. The sensor includes: a first transistor, being a diode-connected transistor; a second transistor coupled between a source of the first transistor and ground, wherein a gate of the second transistor is controllable by an enable signal; and a current source configured to control the first transistor and comprising a third transistor, a drain of which is directly connected to a drain of the first transistor, the third transistor being a diode-connected transistor. The oscillator includes: a digital delay cell; and an adjustment device configured to, based on the temperature-sensitive voltage, adjust a delay of the digital delay cell. The digital delay cell produces, based on the adjusted delay, a signal at an oscillation frequency.
-
公开(公告)号：US11264949B2
公开(公告)日：2022-03-01
申请号：US17303215
申请日：2021-05-24
摘要： Apparatus and methods for rotary traveling wave oscillators (RTWOs) are disclosed. In certain embodiments, an RTWO system include an RTWO ring that carries a traveling wave, a plurality of selectable capacitors distributed around the RTWO ring and each operable in a selected state and an unselected state, and a decoder system that controls selection of the plurality of selectable capacitors based on a frequency tuning code. The frequency tuning code includes a fine tuning code and a coarse tuning code, and the decoder system is operable to maintain a constant number of capacitors that toggle state for each value of the fine tuning code.
-
-
-
-
-
-
-
-
-
搜索结果
2549 条记录 (耗时 0.037 秒)
