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公开(公告)号：US10657919B2
公开(公告)日：2020-05-19
申请号：US15327305
申请日：2016-12-29
Inventor： Yafeng Li
IPC: G09G3/36 , G09G3/3266 , G09G3/20
Abstract: Disclosed are a gate driving circuit and a driving method thereof, and a display device using the driving circuit. In the gate driving circuit, a Qn node in a nth-stage circuit is precharged when a Qn−1 node output signal in a previous-stage driving circuit and a Qn+1 node output signal in a next-stage driving circuit are both at high levels, and thus stability of a Gn output end in the nth-stage circuit can be greatly improved. Meanwhile, a first transistor and a second transistor are connected in series, and a third transistor and a fourth transistor are connected in series.
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公开(公告)号：US10339870B2
公开(公告)日：2019-07-02
申请号：US15506237
申请日：2016-12-30
Inventor： Yafeng Li
IPC: G09G3/36 , G09G3/3266 , G09G3/3258 , G11C19/28 , G11C19/18
Abstract: The invention provides a GOA circuit, comprising a plurality of GOA units, for a positive integer n, n-th GOA unit comprising: a first TFT (T1), a second TFT (T2), a third TFT (T3), a fourth TFT T(4), a fifth TFT (T5), a sixth TFT (T6), a seventh TFT (T7), an eighth TFT (T8), a ninth TFT (T9), a tenth TFT (T10), a first capacitor (C1) and a second capacitor (T2). The invention, based on known GOA circuit, uses T9 and T10 so as to achieve forward and backward scanning without D2U and U2D control signals, which facilitates narrow border design and simplifies corresponding driving timing and reduce IC cost. The pre-charging unit formed by T1, T9, T3, and T10 effectively improves the current leakage and ensures GOA circuit stability.
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公开(公告)号：US10249246B2
公开(公告)日：2019-04-02
申请号：US15506236
申请日：2016-12-30
Inventor： Yafeng Li
IPC: G09G3/3266 , G09G3/3258 , G09G3/36
Abstract: The invention provides a GOA circuit, comprising a plurality of GOA units, for a positive integer n, n-th GOA unit comprising: a first TFT (T1), a second TFT (T2), a third TFT (T3), a fourth TFT T(4), a fifth TFT (T5), a sixth TFT (T6), a seventh TFT (T7), an eighth TFT (T8), a ninth TFT (T9), a tenth TFT (T10), a first capacitor (C1) and a second capacitor (T2). The invention, based on known GOA circuit, uses T9 and T10 so as to achieve forward and backward scanning without D2U and U2D control signals, which facilitates narrow border design and simplifies corresponding driving timing and reduce IC cost.
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公开(公告)号：US10043474B2
公开(公告)日：2018-08-07
申请号：US14916343
申请日：2016-02-24
IPC: G09G3/36
Abstract: A gate driving circuit disposed on an array substrate and an LCD using the same are described. The gate driving circuit on the array substrate comprises a plurality of sequentially connected gate driving units. The gate driving circuit unit comprises an input module, a reset module, a latch module and a signal processing module. The signal processing module receives the current inverse stage-transmitting signal XQ(N), the low voltage signal, a second clock signal and a third clock signal to control on/off statuses of two transistors by the current stage-transmitting signal Q(N) so that the two transistors forms Nth gate signal G(N) and gate signal (N+1)th based on the second clock signal and the third clock signal. The present invention utilizes less clock signals and transistors, which is favorable to the narrower LCD's frame design and solves the problem of manufacturing process restriction of the LCD panel.
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公开(公告)号：US20180218682A1
公开(公告)日：2018-08-02
申请号：US15506241
申请日：2016-12-30
Inventor： Yafeng Li
IPC: G09G3/3258 , G09G3/3266 , G09G3/36
CPC classification number: G09G3/3258 , G09G3/3266 , G09G3/3677 , G09G2310/0286 , G09G2310/0289 , G09G2310/067 , G09G2310/08 , G09G2320/0209 , G09G2320/0219
Abstract: The present invention relates to a GOA circuit. The GOA circuit of the present invention comprises a plurality of GOA circuit units which are cascade coupled, wherein n is set to be a natural number larger than 0, and the nth level GOA circuit unit comprises: a first thin film transistor (T1), a second thin film transistor (T2), a third thin film transistor (T3), a fourth thin film transistor (T4), a fifth thin film transistor (T5), a sixth thin film transistor (T6), a seventh thin film transistor (T7), an eighth thin film transistor (T8), a ninth thin film transistor (T9), a tenth thin film transistor (T10), a first capacitor (C1) and a second capacitor (C2). Moreover, two control signals (Select1, Select2) are introduced. The present invention provides a new GOA circuit. The circuit possesses MLG function, which can effectively reduce the feedthrough and improve the Vcom uniformity in the panel to promote the quality of the image display.
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Patent Agency Ranking
公开(公告)号：US20180182334A1
公开(公告)日：2018-06-28
申请号：US15128420
申请日：2016-08-30
Inventor： Yafeng Li
IPC: G09G3/36
CPC classification number: G09G3/3674 , G09G3/36 , G09G2310/0283
Abstract: The invention provides a GOA circuit, the forward-and-reverse scan control module of the GOA circuit comprising: a first TFT and a third TFT, the first TFT having the gate connected to the gate scan drive signal of the (n−1)-th GOA unit, the source connected to the first constant voltage, and the drain connected to a first node; and the third TFT having the gate connected to the gate scan drive signal of the (n+1)-th GOA unit, the source connected to the first constant voltage, and the drain connected to the first node. With the two TFTs to control the switching of forward and reverse scanning of the GOA circuit, the present invention eliminates two control signals without increasing the numbers of TFTs and capacitors. As such, the selection for IC is increased, which enables the realization of narrow border LCD.
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公开(公告)号：US20180040600A1
公开(公告)日：2018-02-08
申请号：US14912599
申请日：2016-01-29
Inventor： Yafeng Li , Jinfang Wu
IPC: H01L27/02 , H01L29/417 , G02F1/1362 , H01L27/12 , G09G3/36 , G02F1/1345
CPC classification number: H01L27/0207 , G02F1/13454 , G02F1/136213 , G09G3/3648 , G09G3/3674 , G09G3/3677 , G09G2310/0283 , G09G2310/0286 , H01L27/1214 , H01L29/41733
Abstract: The present invention provides a GOA circuit based on LTPS semiconductor thin film transistor to control the voltage levels of the first node (Q(n)) and the second node (P(n)) with the forward scan direct current control signal (U2D) and the backward scan direct current control signal (D2U). The clock signal (CK(M)) is merely in charge of the output of the GOA unit of corresponding stage, which can effectively reduce the loading of the clock signal. It ensures that the entire loading of the clock signal after the GOA units of multiple stages are coupled to promote the output stability of the GOA circuit, and to realize the forward-backward scan of the GOA circuit. Moreover, the GOA unit of each stage comprises only ten thin film transistors, which is beneficial to reduce the layout space of the GOA circuit and to achieve the narrow frame design of the display device.
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公开(公告)号：US20180033389A1
公开(公告)日：2018-02-01
申请号：US14913991
申请日：2016-01-28
Inventor： Yafeng Li , Jinfang Wu
CPC classification number: G09G3/3677 , G09G3/20 , G09G3/2092 , G09G3/3696 , G09G2300/0408 , G09G2310/0267 , G09G2310/0283 , G09G2310/0286 , G09G2310/0289 , G09G2310/08 , G09G2320/0214 , G11C19/184 , G11C19/28
Abstract: The invention provides a GOA circuit for LTPS-TFT, by adding the twelfth and thirteenth TFTs (T12, T13) controlled by output ends (G(n−1), G(n+1)) of (n−1)-th and (n+1)-th GOA units, the drain of twelfth TFT T12 connected through the fourth node (W1(n)) to source of first TFT (T1), the drain of first TFT (T1) connected to output end of (n−1)-th GOA unit, the drain of thirteenth TFT (T13) connected through the fifth node W2(n) to source of third TFT (T3), the drain of third TFT (T3) connected to output end of (n+1)-th GOA unit; the first and third TFTs (T1, T3) controlled respectively by the forward and backward scan DC control signals (U2D, D2U) to reduce leakage of twelfth TFT (T12) in forward scanning and leakage of thirteenth TFT (T13) in backward scanning. As such, the leakage in key TFTs is reduced and GOA circuit stability is improved.
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公开(公告)号：US09857619B2
公开(公告)日：2018-01-02
申请号：US15009547
申请日：2016-01-28
Inventor： Yafeng Li , Xiangyi Peng
IPC: H01L27/14 , G02F1/1335 , G02F1/1339 , G02F1/1362 , G02F1/1368
CPC classification number: G02F1/133512 , G02F1/133514 , G02F1/13394 , G02F1/136259 , G02F1/136286 , G02F1/1368 , G02F2001/136295
Abstract: The present disclosure discloses a display panel, including a color filter plate substrate and an array substrate; the color filter plate substrate includes a black matrix and a protective layer; the color filter plate substrate and the array substrate are disposed opposite; the protective layer is disposed on a side of the black matrix oriented to the array substrate in a laser incidence region during laser repair. The protective layer is disposed on a side of the black matrix oriented to the array substrate in a laser incidence region during laser repair according to the disclosure, therefore, the preventive layer can protect the black matrix during laser repair from forming a through-hole on the black matrix that can leak light.
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公开(公告)号：US09841620B2
公开(公告)日：2017-12-12
申请号：US14907817
申请日：2015-12-29
Inventor： Yafeng Li
CPC classification number: G02F1/1303 , G09G3/36 , G09G3/3648 , G09G3/3677 , G09G2300/0408 , G09G2310/0286 , G09G2310/0289 , G11C19/28
Abstract: The present invention provides a GOA circuit based on LTPS semiconductor thin film transistor to control the voltage levels of the first node, the second node and the third node (Q(n), P1(n), P2(n)) with the forward scan direct current control signal (U2D) and the backward scan direct current control signal (D2U). The clock signal (CK(M)) is merely in charge of the output of the GOA unit of corresponding stage, which can effectively reduce the loading of the clock signal. It ensures that the entire loading of the clock signal after the GOA units of multiple stages are coupled to promote the output stability of the GOA circuit, and to realize the forward-backward scan of the GOA circuit.
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