公开(公告)号：US20210126587A1

公开(公告)日：2021-04-29

申请号：US16661174

申请日：2019-10-23

Applicant: Silicon Laboratories Inc.

Inventor： Luigi Panseri ,  Mustafa H. Koroglu ,  Praveen Vangala ,  John M. Khoury

IPC: H03F1/02 ,  H03F3/24 ,  H03F1/32 ,  H04B1/40

Abstract: An apparatus includes a radio-frequency (RF) circuit, which includes a power amplifier coupled to receive an RF input signal and to provide an RF output signal in response to a modified bias signal. The RF circuit further includes a bias path circuit coupled to modify a bias signal as a function of a characteristic of an input signal to generate the modified bias signal. The bias path circuit provides the modified bias signal to the power amplifier.

公开(公告)号：US10831159B2

公开(公告)日：2020-11-10

申请号：US16221430

申请日：2018-12-14

Applicant: Silicon Laboratories Inc.

Inventor： John M. Khoury

IPC: G04F10/00 ,  H03L7/085

Abstract: An apparatus includes a time-to-digital converter (TDC). The TDC includes a fine TDC (F-TDC) to generate a first output signal in a first range in response to a first signal and a second signal, and a coarse TDC (C-TDC) to generate a second output signal in a second range in response to the first signal and a delayed version of the second signal.

公开(公告)号：US10469295B2

公开(公告)日：2019-11-05

申请号：US15798590

申请日：2017-10-31

Applicant: Silicon Laboratories Inc.

Inventor： John M. Khoury ,  Navin Harwalkar

IPC: H04L27/06 ,  H04B1/00 ,  G01R19/25 ,  G01R23/165 ,  H04B1/04

Abstract: In one aspect, an apparatus includes: a mixer to receive a radio frequency (RF) signal and downconvert the RF signal into a second frequency signal; an amplifier coupled to the mixer to amplify the second frequency signal; an image rejection (IR) circuit coupled to the programmable gain amplifier (PGA) to orthogonally correct a gain and a phase of the amplified second frequency signal to output a corrected amplified second frequency signal; and a complex filter to filter the corrected amplified second frequency signal.

公开(公告)号：US10461787B2

公开(公告)日：2019-10-29

申请号：US15883232

申请日：2018-01-30

Applicant: Silicon Laboratories Inc.

Inventor： Phillip Matthews ,  Paul I. Zavalney ,  John M. Khoury ,  Karma S. Bhutia

IPC: H04B1/10 ,  H04B1/04 ,  H04B1/00 ,  H04L27/00

Abstract: Systems and methods are disclosed for spur mitigation for pulse signal drivers in radio frequency (RF) devices. An RF integrated circuit includes RF circuitry and analog-to-digital (ADC) circuitry. The RF circuitry operates using a local oscillator (LO) clock to receive and/or transmit RF signals, and the ADC circuitry samples one or more analog input signals and has internal timing based upon a raw digital clock. A retime circuit receives the raw digital clock and the LO clock and has a retimed clock as an output. The retimed clock represents the raw digital clock retimed with the LO clock. While other digital circuitry is timed using the raw digital clock, one or more drivers are timed by the retimed clock and provide pulse output signals to output pads. Having the drivers timed with the retimed clock and other digital circuitry timed with the raw digital clock improves overall performance.

公开(公告)号：US09973285B1

公开(公告)日：2018-05-15

申请号：US15352775

申请日：2016-11-16

Applicant: Silicon Laboratories Inc.

Inventor： John M. Khoury

IPC: H04B14/02 ,  H02M3/04 ,  H04B1/12 ,  H02M1/44

CPC classification number: H04B14/026 ,  H02M1/44 ,  H02M3/04 ,  H02M3/158 ,  H04B1/123

Abstract: In one aspect, an apparatus includes: a pulse frequency modulation (PFM) voltage converter to receive a first voltage and provide a second voltage to a load; and a pulse generator. The PFM voltage converter may include an inductor to store energy based on the first voltage and a switch controllable to switchably couple the first voltage to the inductor. The pulse generator may be configured to generate at least one pulse pair to control the switch, where this pulse pair is formed of a first pulse and a second pulse substantially identical to the first pulse, where the second pulse is separated from the first pulse by a pulse separation interval, when the second voltage is less than a first threshold voltage.

公开(公告)号：US20180054337A1

公开(公告)日：2018-02-22

申请号：US15798590

申请日：2017-10-31

Applicant: Silicon Laboratories Inc.

Inventor： John M. Khoury ,  Navin Harwalkar

IPC: H04L27/06 ,  H04B1/00 ,  G01R19/25 ,  G01R23/165 ,  H04B1/04

CPC classification number: H04L27/06 ,  G01R19/2506 ,  G01R23/165 ,  H04B1/0021 ,  H04B2001/0416

Abstract: In one aspect, an apparatus includes: a mixer to receive a radio frequency (RF) signal and downconvert the RF signal into a second frequency signal; an amplifier coupled to the mixer to amplify the second frequency signal; an image rejection (IR) circuit coupled to the programmable gain amplifier (PGA) to orthogonally correct a gain and a phase of the amplified second frequency signal to output a corrected amplified second frequency signal; and a complex filter to filter the corrected amplified second frequency signal.