公开(公告)号：US20210296445A1

公开(公告)日：2021-09-23

申请号：US17203010

申请日：2021-03-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minhyun LEE ,  Minsu SEOL ,  Yeonchoo CHO ,  Hyeonjin SHIN

IPC: H01L29/10 ,  H01L29/423 ,  H01L29/24

Abstract: A field effect transistor includes a substrate, a source electrode and a drain electrode on the substrate and apart from each other in a first direction, a plurality of channel layers, a gate insulating film surrounding each of the plurality of channel layers, and a gate electrode surrounding the gate insulating film. Each of the plurality of channel layers has ends contacting the source electrode and the drain electrode. The plurality of channel layers are spaced apart from each other in a second direction away from the substrate. The plurality of channel layers include a 2D semiconductor material.

公开(公告)号：US20210288171A1

公开(公告)日：2021-09-16

申请号：US17201485

申请日：2021-03-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minhyun LEE ,  Minsu SEOL ,  Yeonchoo CHO ,  Hyeonjin SHIN

IPC: H01L29/778 ,  H01L29/78 ,  H01L29/24 ,  H01L27/092

Abstract: A vertical type transistor includes: a substrate; a first source/drain electrode layer provided on the substrate; a second source/drain electrode layer provided above the first source/drain electrode layer; a first gate electrode layer provided between the first and second source/drain electrode layers; a first gate insulating film passing through the first gate electrode layer; a hole passing through the second source/drain electrode layer, the first gate insulating film, and the first source/drain electrode layer; and a first channel layer provided on a lateral side of the hole, wherein the first channel layer may include a 2D semiconductor.

公开(公告)号：US20190294047A1

公开(公告)日：2019-09-26

申请号：US16426046

申请日：2019-05-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonjin SHIN ,  Sangwon KIM ,  Minsu SEOL ,  Seongjun PARK ,  Yeonchoo CHO

IPC: G03F7/11 ,  G03F7/36 ,  G03F7/09 ,  G03F7/16

Abstract: A hardmask composition may include graphene nanoparticles having a size in a range of about 5 nm to about 100 nm and a solvent.

公开(公告)号：US20160315561A1

公开(公告)日：2016-10-27

申请号：US15049726

申请日：2016-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonjin SHIN ,  Kyungeun BYUN ,  Minsu SEOL ,  Seongjun PARK

IPC: H02N1/04

CPC classification number: H02N1/04

Abstract: A triboelectric generator includes first and second electrodes facing each other, and a first energy generation layer provided on the first electrode and generating electric energy through contact with other material, the first energy generation layer comprising a two-dimensional (2D) material having a crystal structure of a 2D shape.

Abstract translation: 摩擦电发生器包括彼此面对的第一和第二电极，以及设置在第一电极上并通过与其它材料接触而产生电能的第一能量产生层，第一能量产生层包括具有晶体的二维（2D）材料 2D形状的结构。

公开(公告)号：US20250159946A1

公开(公告)日：2025-05-15

申请号：US18811194

申请日：2024-08-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung-Eun BYUN ,  Baekwon PARK ,  Keunwook SHIN ,  Changhyun KIM ,  Minsu SEOL ,  Joungeun YOO ,  Hyunmi LEE

IPC: H01L29/76 ,  H01L21/02 ,  H01L21/443 ,  H01L29/06 ,  H01L29/24 ,  H01L29/423 ,  H01L29/49 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device may include a gate electrode, a metal nitride layer on the gate electrode, a gate insulating film on the metal nitride layer, a channel on the gate insulating film, a source electrode in one side of the channel, and a drain electrode in another side of the channel.

公开(公告)号：US20250142907A1

公开(公告)日：2025-05-01

申请号：US18643087

申请日：2024-04-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changhyun KIM ,  Kyung-Eun BYUN ,  Minsu SEOL ,  Junyoung KWON ,  Huije RYU ,  Eunkyu LEE ,  Yeonchoo CHO

IPC: H01L29/10 ,  H01L29/06

Abstract: A semiconductor device may include a substrate, a vertical channel, a gate electrode, and a conductive layer. The vertical channel may have a tube shape extending in a direction perpendicular to a surface of the substrate. The gate electrode may face the vertical channel with an outer insulating layer therebetween on an outer circumferential surface of the vertical channel. The conductive layer may face the vertical channel with an inner insulating layer therebetween on an inner circumferential surface of the vertical channel.

公开(公告)号：US20250142896A1

公开(公告)日：2025-05-01

申请号：US18820588

申请日：2024-08-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung-Eun BYUN ,  Baekwon PARK ,  Minsu SEOL ,  Sungil PARK ,  Jaehyun PARK ,  Min seok YOO

IPC: H01L29/76 ,  H01L21/02 ,  H01L29/06 ,  H01L29/24 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device includes a metal nitride layer, a channel provided in the metal nitride layer and including a two-dimensional (2D) semiconductor material, a source electrode provided on one side of the channel, a drain electrode provided on another side of the channel, a gate insulating layer provided in the channel, and a gate electrode provided on the gate insulating layer.

公开(公告)号：US20250120130A1

公开(公告)日：2025-04-10

申请号：US18823988

申请日：2024-09-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minsu SEOL ,  Changhyun KIM ,  Kyung-Eun BYUN ,  Eunkyu LEE

IPC: H01L29/76 ,  H01L21/02 ,  H01L29/24 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

Abstract: Provided are a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes a source electrode provided on a substrate, a drain electrode disposed away from the source electrode, and a channel connected between the source electrode and the drain electrode, wherein the channel includes a plurality of first channel layers and plurality of second channel layers, and the gate electrode is provided on one surface and another surface of each of the plurality of the first channel layers and on one surface and another surface of each of the plurality of the second channel layers.

公开(公告)号：US20240363689A1

公开(公告)日：2024-10-31

申请号：US18761779

申请日：2024-07-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minhyun LEE ,  Minsu SEOL ,  Yeonchoo CHO ,  Hyeonjin SHIN

IPC: H01L29/10 ,  H01L21/02 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/1037 ,  H01L21/02568 ,  H01L29/408 ,  H01L29/41791 ,  H01L29/42364 ,  H01L29/66795 ,  H01L29/785

Abstract: Provided is a semiconductor device which use a two-dimensional semiconductor material as a channel layer. The semiconductor device includes: a gate electrode on a substrate; a gate dielectric on the gate electrode; a channel layer on the gate dielectric; and a source electrode and a drain electrode that may be electrically connected to the channel layer. The gate dielectric has a shape with a height greater than a width, and the channel layer includes a two-dimensional semiconductor material.

公开(公告)号：US20240162337A1

公开(公告)日：2024-05-16

申请号：US18510063

申请日：2023-11-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Van Luan NGUYEN ,  Hyeonjin SHIN ,  Minsu SEOL ,  Yunseong LEE

IPC: H01L29/778 ,  H01L29/417 ,  H01L29/423

CPC classification number: H01L29/778 ,  H01L29/41758 ,  H01L29/42364

Abstract: A semiconductor device including a two-dimensional material is provided. The semiconductor device may include a two-dimensional material layer having semiconductor properties, a self-assembled monolayer in which self-assembled molecules are packed side-by-side, the self-assembled monolayer being arranged on the two-dimensional material layer, and an oxide layer arranged on the self-assembled monolayer.