公开(公告)号：US20220199758A1

公开(公告)日：2022-06-23

申请号：US17132970

申请日：2020-12-23

申请人： Intel Corporation

发明人： Arnab Sen Gupta ,  Jason C. Retasket ,  Matthew V. Metz ,  I-Cheng Tung ,  Chia-Ching Lin ,  Sou-Chi Chang ,  Kaan Oguz ,  Uygar E. Avci ,  Edward Johnson

IPC分类号： H01L49/02 ,  H01L29/51 ,  H01L23/522 ,  H01L27/06 ,  H01L29/78

摘要： Capacitors with a carbon-based electrode layer in contact with a ferroelectric insulator. The insulator may be a perovskite oxide. Low reactivity of the carbon-based electrode may improve stability of a ferroelectric capacitor. A carbon-based electrode layer may be predominantly carbon and have a low electrical resistivity. A carbon-based electrode layer may be the only layer of an electrode, or it may be a barrier between the insulator and another electrode layer. Both electrodes of a capacitor may include a carbon-based electrode layer, or a carbon-based electrode layer may be included in only one electrode.

公开(公告)号：US11362263B2

公开(公告)日：2022-06-14

申请号：US16024411

申请日：2018-06-29

申请人： Intel Corporation

发明人： Noriyuki Sato ,  Tanay Gosavi ,  Justin Brockman ,  Sasikanth Manipatruni ,  Kaan Oguz ,  Kevin O'Brien ,  Christopher Wiegand ,  Angeline Smith ,  Tofizur Rahman ,  Ian Young

IPC分类号： H01L43/02 ,  G11C11/16 ,  H01L43/12 ,  H01L43/10 ,  B82Y25/00

摘要： A perpendicular spin orbit torque (SOT) memory device includes an electrode having a spin orbit coupling material and a magnetic tunnel junction (MTJ) device on a portion of the electrode. The electrode has a first SOC layer and a second SOC layer on a portion of the first SOC layer, where at least a portion of the first SOC layer at an interface with the second SOC layer includes oxygen.

公开(公告)号：US11227644B2

公开(公告)日：2022-01-18

申请号：US15942086

申请日：2018-03-30

申请人： Intel Corporation

发明人： Kevin O'Brien ,  Noriyuki Sato ,  Kaan Oguz ,  Mark Doczy ,  Charles Kuo

IPC分类号： G11C11/16 ,  H01L43/12 ,  H01L27/22 ,  B82Y25/00

摘要： A spin orbit torque (SOT) memory device includes a MTJ device on a SOT electrode, where a first portion of the SOT electrode extends beyond a sidewall of the MTJ by a first length that is no greater than a height of the MTJ, and where a second portion of the first electrode extends from the sidewall and under the MTJ by a second length that is no greater than a width of the MTJ. The MTJ device includes a free magnet, a fixed magnet and a tunnel barrier between the free magnet and the fixed magnet.

公开(公告)号：US10937807B2

公开(公告)日：2021-03-02

申请号：US16465044

申请日：2016-12-29

申请人： INTEL CORPORATION

发明人： Brian S. Doyle ,  Kaan Oguz ,  Ricky J. Tseng ,  Kevin P. O'Brien

IPC分类号： H01L27/115 ,  H01L29/66 ,  H01L29/78 ,  H01L27/1159 ,  G11C5/06

摘要： Techniques are disclosed for forming integrated circuit (IC) devices that include ferroelectric field-effect transistors (FE-FETs) having a top gate and a bottom gate (or, generally, a dual-gate configuration). The disclosed FE-FET devices may be formed in the back end of the IC structure and may be implemented with various materials that exhibit ferroelectric properties when processed at temperatures within the thermal budget of the back-end processing. The disclosed back-end FE-FET devices can achieve greater than two resistance states, depending on the direction of poling of the top and bottom gates, thereby enabling the formation of 3-state and 4-state memory devices, for example. Additionally, as will be appreciated in light of this disclosure, the disclosed back-end FE-FET devices can free up floor space in the front-end, thereby providing space for additional devices in the front-end.

公开(公告)号：US10707409B2

公开(公告)日：2020-07-07

申请号：US15882546

申请日：2018-01-29

申请人： INTEL CORPORATION

发明人： Charles C. Kuo ,  Kaan Oguz ,  Brian S. Doyle ,  Mark L. Doczy ,  David L. Kencke ,  Satyarth Suri ,  Robert S. Chau

IPC分类号： H01L43/08 ,  H01L43/02 ,  G11C11/16 ,  H01L43/12

摘要： Techniques are disclosed for fabricating a self-aligned spin-transfer torque memory (STTM) device with a dot-contacted free magnetic layer. In some embodiments, the disclosed STTM device includes a first dielectric spacer covering sidewalls of an electrically conductive hardmask layer that is patterned to provide an electronic contact for the STTM's free magnetic layer. The hardmask contact can be narrower than the free magnetic layer. The first dielectric spacer can be utilized in patterning the STTM's fixed magnetic layer. In some embodiments, the STTM further includes an optional second dielectric spacer covering sidewalls of its free magnetic layer. The second dielectric spacer can be utilized in patterning the STTM's fixed magnetic layer and may serve, at least in part, to protect the sidewalls of the free magnetic layer from redepositing of etch byproducts during such patterning, thereby preventing electrical shorting between the fixed magnetic layer and the free magnetic layer.

公开(公告)号：US10580970B2

公开(公告)日：2020-03-03

申请号：US15755444

申请日：2015-09-25

申请人： Intel Corporation

发明人： Kaan Oguz ,  Kevin P. O'Brien ,  Christopher J. Wiegand ,  Tofizur Rahman ,  Brian S. Doyle ,  Mark L. Doczy ,  Oleg Golonzka ,  Tahir Ghani ,  Justin S. Brockman

IPC分类号： H01L43/08 ,  H01L43/10 ,  H01L43/12 ,  H01F10/32 ,  H01F41/30 ,  G11C11/16 ,  H01L27/22 ,  H01L43/02

摘要： MTJ material stacks, pSTTM devices employing such stacks, and computing platforms employing such STTM devices. In some embodiments, perpendicular MTJ material stacks with free magnetic layers are magnetically coupled through a metal material layer for improved stability and low damping. In some advantageous embodiments, layers of a free magnetic material stack are magnetically coupled through a coupling layer of a metal comprising at least molybdenum (Mo). The Mo may be in pure form or alloyed with other constituents.

公开(公告)号：US20200006630A1

公开(公告)日：2020-01-02

申请号：US16024393

申请日：2018-06-29

申请人： Intel Corporation

发明人： Noriyuki Sato ,  Tanay Gosavi ,  Gary Allen ,  Sasikanth Manipatruni ,  Kaan Oguz ,  Kevin O'Brien ,  Christopher Wiegand ,  Angeline Smith ,  Tofizur Rahman ,  Ian Young ,  Ben Buford

IPC分类号： H01L43/02 ,  H01L43/12 ,  H01L27/22 ,  G11C11/16 ,  H01F10/32

摘要： A spin orbit torque (SOT) memory device includes a SOT electrode having a spin orbit coupling material. The SOT electrode has a first sidewall and a second sidewall opposite to the first sidewall. The SOT memory device further includes a magnetic tunnel junction device on a portion of the SOT electrode. A first MTJ sidewall intersects the first SOT sidewall and a portion of the first MTJ sidewall and the SOT sidewall has a continuous first slope. The MTJ device has a second sidewall that does not extend beyond the second SOT sidewall and at least a portion of the second MTJ sidewall has a second slope.

公开(公告)号：US20190305212A1

公开(公告)日：2019-10-03

申请号：US15943461

申请日：2018-04-02

申请人： Intel Corporation

发明人： Tanay Gosavi ,  Sasikanth Manipatruni ,  Kaan Oguz ,  Ian Young ,  Dmitri Nikonov ,  Chia-Ching Lin

IPC分类号： H01L43/04 ,  H01L43/06 ,  H01L43/10 ,  H01L43/14 ,  G11C11/16

摘要： An apparatus is provided which comprises: a magnetic junction having a magnet with a first magnetization (e.g., perpendicular magnetization); a first structure adjacent to the magnetic junction, wherein the first structure comprises metal (e.g., Hf, Ta, W, Ir, Pt, Bi, Cu, Mo, Gf, Ge, Ga, or Au); an interconnect adjacent to the first structure; and a second structure adjacent to the interconnect such that the first structure and the second structure are on opposite surfaces of the interconnect, wherein the second structure comprises a magnet with a second magnetization (e.g., in-plane magnetization) substantially different from the first magnetization.

公开(公告)号：US20180301619A1

公开(公告)日：2018-10-18

申请号：US15735616

申请日：2015-06-26

申请人： Intel Corporation

发明人： Kaan Oguz ,  Kevin P. O'Brien ,  Brian S. Doyle ,  David L. Kencke ,  Charles C. Kuo ,  Robert S. Chau

IPC分类号： H01L43/02 ,  H01L27/22 ,  H01L43/10

摘要： An embodiment includes an apparatus comprising: a substrate; and a perpendicular magnetic tunnel junction (pMTJ) comprising a fixed layer and first and second free layers; wherein (a) the first free layer includes Cobalt (Co), Iron (Fe), and Boron (B), and (b) the second free layer is epitaxial and includes Manganese (Mn) and Gallium (Ga). Other embodiments are described herein.

公开(公告)号：US20180287050A1

公开(公告)日：2018-10-04

申请号：US15755488

申请日：2015-09-25

申请人： Intel Corporation

发明人： Prashanth P. Madras ,  MD Tofizur Rahman ,  Christopher J. Wiegand ,  Brian Maertz ,  Oleg Golonzka ,  Kevin P. O'Brien ,  Mark L. Doczy ,  Brian S. Doyle ,  Tahir Ghani ,  Kaan Oguz

IPC分类号： H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12 ,  H01F10/32 ,  G11C11/16 ,  H01L27/22

摘要： MTJ material stacks with a laterally strained free magnetic layer, STTM devices employing such stacks, and computing platforms employing such STTM devices. In some embodiments, perpendicular pMTJ material stacks included free magnetic layers that are compressively strained laterally by a surrounding material, which increases coercive field strength for a more stable device. In some embodiments, a pMTJ material stack is encased in a compressive-stressed material. In some further embodiments, a pMTJ material stack is encased first in a dielectric shell, permitting a conductive material to be deposited over the shell as the compressive-stressed, strain-inducing material layer.