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公开(公告)号：US20190157432A1
公开(公告)日：2019-05-23
申请号：US15983055
申请日：2018-05-17
Inventor： Jun Liu , Luke Ding , Jiangang Fang , Bin Zhou , Leilei Cheng , Wei Li
IPC: H01L29/66 , H01L29/786 , H01L21/44 , H01L21/4763 , H01L21/4757 , H01L21/475 , H01L29/40
Abstract: A manufacturing method of a display substrate, a display substrate, and a display device are disclosed. The manufacturing method includes: forming an active layer; forming a gate insulation film layer, a gate film layer and a photoresist film layer; exposing the photoresist film layer to a light and developing the exposed photoresist film layer until the developed photoresist film layer has a thickness of 1.8-2.2 μm and a slope angle not less than 70°; over-etching the gate film layer to form a gate electrode, an orthographic projection of the gate electrode being located within a region of an orthographic projection of the developed photoresist film layer; over-etching the gate insulation film layer by a gaseous corrosion method to form a gate insulation layer; peeling off the photoresist film layer remaining on a surface of the gate electrode; and performing a conductive treatment to the active layer.
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公开(公告)号：US12062711B2
公开(公告)日：2024-08-13
申请号：US17449607
申请日：2021-09-30
Inventor： Jun Liu , Luke Ding , Jingang Fang , Bin Zhou , Leilei Cheng , Wei Li
IPC: H01L29/66 , H01L21/027 , H01L21/311 , H01L21/3213 , H01L21/44 , H01L21/475 , H01L21/4757 , H01L21/4763 , H01L27/12 , H01L29/40 , H01L29/417 , H01L29/786
CPC classification number: H01L29/66969 , H01L21/0274 , H01L21/31116 , H01L21/31144 , H01L21/32139 , H01L21/44 , H01L21/475 , H01L21/47573 , H01L21/47635 , H01L27/1288 , H01L29/401 , H01L29/7869 , H01L29/41733 , H01L29/78633
Abstract: A manufacturing method of a display substrate, a display substrate, and a display device. The manufacturing method includes: forming an active layer; forming a gate insulation film layer, a gate film layer and a photoresist film layer; exposing the photoresist film layer to a light and developing the exposed photoresist film layer until the developed photoresist film layer has a thickness of 1.8-2.2 μm and a slope angle not less than 70°; over-etching the gate film layer to form a gate electrode, an orthographic projection of the gate electrode being located within a region of an orthographic projection of the developed photoresist film layer; over-etching the gate insulation film layer by a gaseous corrosion method to form a gate insulation layer; peeling off the photoresist film layer remaining on a surface of the gate electrode; and performing a conductive treatment to the active layer.
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公开(公告)号：US11961848B2
公开(公告)日：2024-04-16
申请号：US17265789
申请日：2020-05-14
Inventor： Jun Liu , Liangchen Yan , Bin Zhou , Yadong Liang , Ning Liu , Leilei Cheng , Jingang Fang
IPC: H01L27/12 , H01L21/02 , H01L21/4757 , H01L21/4763
CPC classification number: H01L27/1248 , H01L27/124 , H01L27/127 , H01L21/02178 , H01L21/02244 , H01L21/02252 , H01L21/47573 , H01L21/47635 , H01L27/1225
Abstract: Disclosed are a display substrate and a manufacturing method therefor, and a display device. The display substrate comprises: a substrate base, and an active layer, a gate insulating layer, a first metal film layer, an interlayer insulating layer, a second metal film layer, and a passivation layer stacked in sequence on the substrate base. The first metal film layer comprises a pattern of a gate and a gate line. The second metal film layer comprises a pattern of a source/drain and a data line. The gate line and the data line are partially arranged opposite to each other. An oxide metal layer is provided on the surface of the side of the region of the gate line opposite to the data line facing the data line.
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公开(公告)号：US11930679B2
公开(公告)日：2024-03-12
申请号：US17264283
申请日：2020-05-12
Inventor： Jingang Fang , Luke Ding , Jun Liu , Bin Zhou , Jun Cheng
IPC: H10K59/35 , H01L27/12 , H10K50/86 , H10K59/12 , H10K59/121 , H10K59/123 , H10K59/124 , H10K71/00
CPC classification number: H10K59/353 , H10K50/865 , H10K59/1213 , H10K71/00 , H10K59/1201
Abstract: The present disclosure relates to the technical field of display, and discloses an array substrate, a preparation method therefor, and a display device. When dielectric layers, such as a buffer layer, an interlayer dielectric layer, and a gate insulation layer, are formed between a source-drain electrode and a substrate, the thickness of at least one dielectric layer among said dielectric layers underneath a first through hole for connecting a drain electrode and an anode is increased, which is to say that the drain electrode is raised to be further away from the substrate, causing the drain electrode to be closer to a surface of a planarization layer that faces away from the substrate, i.e., reducing the thickness of a portion of the planarization layer above the drain electrode.
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公开(公告)号：US11785811B2
公开(公告)日：2023-10-10
申请号：US17241703
申请日：2021-04-27
Inventor： Ning Liu , Jun Liu , Wei Song , Qinghe Wang , Bin Zhou , Liangchen Yan
IPC: H01L29/08 , H10K59/124 , H10K59/126 , H10K59/12
CPC classification number: H10K59/124 , H10K59/126 , H10K59/1201
Abstract: An array substrate, a method for manufacturing the array substrate and a display device are provided. The array substrate includes: a base substrate, and a thin film transistor, a storage capacitor, and a lapping pattern for connecting the thin film transistor to the storage capacitor arranged on the base substrate; wherein the thin film transistor includes a semiconductor layer, a gate insulation layer, a gate electrode, an interlayer insulation layer, a source electrode and a drain electrode arranged sequentially in that order; the interlayer insulation layer includes at least two inorganic insulation layers and at least one organic insulation layer laminated one on another, and both a layer proximate to the base substrate and a layer distal to the base substrate in the interlayer insulation layer are the inorganic insulation layers.
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Patent Agency Ranking
公开(公告)号：US20210359140A1
公开(公告)日：2021-11-18
申请号：US16331008
申请日：2018-08-17
Inventor： Yingbin Hu , Ce Zhao , Dongfang Wang , Bin Zhou , Jun Liu , Yuankui Ding , Wei Li
IPC: H01L29/786 , H01L27/12 , H01L29/66
Abstract: A thin film transistor includes an active layer, a source electrode and a drain electrode. The active layer includes a conductive region and the conductive region is between the source electrode and the drain electrode and is spaced apart from at least one of the source electrode and the drain electrode.
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公开(公告)号：US20210184126A1
公开(公告)日：2021-06-17
申请号：US17271637
申请日：2020-05-14
Inventor： Tongshang Su , Dongfang Wang , Jun Liu , Yingbin Hu , Qinghe Wang , Shengping Du , Liangchen Yan
Abstract: A method for manufacturing a light-emitting component, including forming an auxiliary electrode and a first electrode arranged at an interval on a base substrate; depositing, by means of a mask with a hollow area, a light-emitting layer on the base substrate on which the auxiliary electrode and the first electrode are formed; and forming a second electrode on the base substrate on which the light-emitting layer is formed. The light-emitting layer covers at least part of the first electrode, and at least a partial area of the auxiliary electrode is exposed outside the light-emitting layer. The second electrode covers at least part of the light-emitting layer and the at least partial area of the auxiliary electrode, and the second electrode is connected to the at least partial area of the auxiliary electrode.
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58.发明授权公开(公告)号：US11037801B2
公开(公告)日：2021-06-15
申请号：US16657062
申请日：2019-10-18
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Jingang Fang , Luke Ding , Jun Liu , Wei Li , Yang Zhang , Leilei Cheng , Dongfang Wang
IPC: H01L21/32 , H01L21/02 , H01L21/3213 , H01L21/027 , H01L21/28 , H01L21/285
Abstract: A fabrication method of a patterned metal film layer, including: sequentially depositing a first metal layer and a photoresist on a substrate; forming a first patterned photoresist in the photoresist retaining area; etching the first metal layer, and removing a part of the first metal layer having a first thickness and located in an edge area of the photoresist retaining area and in the photoresist removing area, to form a second metal layer; processing the first patterned photoresist to form a second patterned photoresist; etching and removing a part, which is not in contact with the second patterned photoresist, of the second metal layer on the substrate to form a patterned metal film layer.
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公开(公告)号：US10978539B2
公开(公告)日：2021-04-13
申请号：US16456619
申请日：2019-06-28
Inventor： Jun Liu , Liangchen Yan , Bin Zhou , Jun Wang , Tongshang Su , Biao Luo , Yang Zhang
Abstract: An array substrate includes a base substrate, a transistor on the base substrate, a planarization layer on a side of the transistor away from the base substrate, a recessed portion on the planarization layer, and a light blocking portion in the recessed portion. The light blocking portion is configured to prevent a light from being incident upon an active layer.
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公开(公告)号：US10916568B2
公开(公告)日：2021-02-09
申请号：US15777118
申请日：2017-09-26
Abstract: A manufacturing method of a display substrate, an array substrate and a display device are provided. The method includes forming a first wire, a first insulation layer, a first and second metal layer, and a photoresist layer; forming a photoresist retained pattern above the first wire; forming a second and first metal layer retained pattern under the photoresist retained pattern; forming a second insulation layer with a thickness less than or equal to a sum of thicknesses of the first and second metal layer; the second insulation layer forming a fracture region at a boundary between a part covering the first insulation layer and another part covering the second metal layer retained pattern; removing the first and second metal layer retained patterns by a wet etch process to expose the first insulation layer; and forming a contact hole exposing the first wire.
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