公开(公告)号：US20160017497A1

公开(公告)日：2016-01-21

申请号：US14869371

申请日：2015-09-29

Applicant: Applied Materials, Inc.

Inventor： NAGARAJAN RAJAGOPALAN ,  Xinhai HAN ,  Michael TSIANG ,  Masaki OGATA ,  Zhijun JIANG ,  Juan Carlos ROCHA-ALVAREZ ,  Thomas NOWAK ,  Jianhua ZHOU ,  Ramprakash SANKARAKRISHNAN ,  Amit Kumar BANSAL ,  Jeongmin LEE ,  Todd EGAN ,  Edward BUDIARTO ,  Dmitriy PANASYUK ,  Terrance Y. LEE ,  Jian J. CHEN ,  Mohamad A. AYOUB ,  Heung Lak PARK ,  Patrick REILLY ,  Shahid SHAIKH ,  Bok Hoen KIM ,  Sergey STARIK ,  Ganesh BALASUBRAMANIAN

IPC: C23C16/52 ,  C23C16/46 ,  C23C16/509 ,  C23C16/455

CPC classification number: C23C16/52 ,  C23C16/45565 ,  C23C16/4557 ,  C23C16/458 ,  C23C16/46 ,  C23C16/50 ,  C23C16/505 ,  C23C16/509 ,  C23C16/5096 ,  G01B11/0625 ,  G01B11/0683 ,  G01N21/55 ,  G01N21/658 ,  G01N2201/1222 ,  H01L21/00 ,  H01L21/67248 ,  H01L21/67253 ,  H01L21/687

Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.

Abstract translation: 描述了根据PECVD工艺处理衬底的方法。 调整衬底的温度分布以改变衬底上的沉积速率分布。 调整等离子体密度分布以改变跨衬底的沉积速率分布。 暴露于等离子体的室表面被加热以改善等离子体密度均匀性并减少在室表面上形成低质量的沉积物。 原位计量可用于监测沉积过程的进展并触发涉及衬底温度曲线，等离子体密度分布，压力，温度和反应物流动的控制动作。

公开(公告)号：US20150247237A1

公开(公告)日：2015-09-03

申请号：US14594296

申请日：2015-01-12

Applicant: Applied Materials, Inc.

Inventor： Sungwon HA ,  Kwangduk Douglas LEE ,  Ganesh BALASUBRAMANIAN ,  Juan Carlos ROCHA-ALVAREZ ,  Martin Jay SEAMONS ,  Ziqing DUAN ,  Zheng John YE ,  Bok Hoen KIM ,  Lei JING ,  Ngoc LE ,  Ndanka MUKUTI

IPC: C23C16/44 ,  C23C16/455 ,  C23C16/50

CPC classification number: C23C16/45565 ,  C23C16/4401 ,  C23C16/4585 ,  C23C16/5096 ,  H01J37/32091 ,  H01J37/32449

Abstract: Embodiments described herein relate to a faceplate for improving film uniformity. A semiconductor processing apparatus includes a pedestal, an edge ring and a faceplate having distinct regions with differing hole densities. The faceplate has an inner region and an outer region which surrounds the inner region. The inner region has a greater density of holes formed therethrough when compared to the outer region. The inner region is sized to correspond with a substrate being processed while the outer region is sized to correspond with the edge ring.

Abstract translation: 本文所述的实施例涉及一种用于提高膜均匀性的面板。 半导体处理装置包括具有不同孔洞密度区域的基座，边缘环和面板。 面板具有内部区域和围绕内部区域的外部区域。 当与外部区域相比时，内部区域具有通过其形成的更大密度的孔。 内部区域的尺寸被设计成与被处理的基底相对应，而外部区域的尺寸被设计成与边缘环相对应。

公开(公告)号：US20140287593A1

公开(公告)日：2014-09-25

申请号：US14218103

申请日：2014-03-18

Applicant: APPLIED MATERIALS, INC.

Inventor： Xinhai HAN ,  Zhijun JIANG ,  Nagarajan RAJAGOPALAN ,  Bok Hoen KIM ,  Ramprakash SANKARAKRISHNAN ,  Ganesh BALASUBRAMANIAN ,  Juan Carlos ROCHA- ALVAREZ ,  Mukund SRINIVASAN

IPC: H01L21/02

CPC classification number: H01L21/02274 ,  C23C16/345 ,  C23C16/402 ,  C23C16/45523 ,  C23C16/45561 ,  C23C16/509 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/022

Abstract: Methods and apparatus for high rate formation of multi-layer stacks on semiconductor substrate is provided. A chamber for forming such stacks at high rates includes a first precursor line and a second precursor line. The first precursor line is coupled to a first diverter, which is coupled to a gas inlet in a lid assembly of the chamber. The second precursor line is coupled to a second diverter, which is also coupled to the gas inlet. The first diverter is also coupled to a first divert line, and the second diverter is coupled to a second divert line. Each of the first and second divert lines is coupled to a divert exhaust system. A chamber exhaust system is coupled to the chamber. The diverters are typically located close to the lid assembly.

Abstract translation: 提供了在半导体衬底上高速形成多层叠层的方法和装置。 用于以高速率形成这种堆叠的室包括第一前体管线和第二前体管线。 第一前体管线耦合到第一分流器，其连接到腔室的盖组件中的气体入口。 第二前体管线连接到第二转向器，第二分配器也联接到气体入口。 第一分流器还耦合到第一转向管线，并且第二分流器联接到第二转向管线。 第一和第二转向管线中的每一个联接到转向排气系统。 腔室排气系统联接到腔室。 分流器通常位于盖组件附近。

公开(公告)号：US20140118751A1

公开(公告)日：2014-05-01

申请号：US14056203

申请日：2013-10-17

Applicant: Applied Materials, Inc.

Inventor： Nagarajan RAJAGOPALAN ,  Xinhai HAN ,  Michael TSIANG ,  Masaki OGATA ,  Zhijun JIANG ,  Juan Carlos ROCHA-ALVAREZ ,  Thomas NOWAK ,  Jianhua ZHOU ,  Ramprakash SANKARAKRISHNAN ,  Amit Kumar BANSAL ,  Jeongmin LEE ,  Todd EGAN ,  Edward BUDIARTO ,  Dmitriy PANASYUK ,  Terrance Y. LEE ,  Jian J. CHEN ,  Mohamad A. AYOUB ,  Heung Lak PARK ,  Patrick REILLY ,  Shahid SHAIKH ,  Bok Hoen KIM ,  Sergey STARIK ,  Ganesh BALASUBRAMANIAN

IPC: G01B11/06

CPC classification number: C23C16/52 ,  C23C16/45565 ,  C23C16/4557 ,  C23C16/458 ,  C23C16/46 ,  C23C16/50 ,  C23C16/505 ,  C23C16/509 ,  C23C16/5096 ,  G01B11/0625 ,  G01B11/0683 ,  G01N21/55 ,  G01N21/658 ,  G01N2201/1222 ,  H01L21/00 ,  H01L21/67248 ,  H01L21/67253 ,  H01L21/687

Abstract: A method of processing a substrate according to a PECVD process is described. Temperature profile of the substrate is adjusted to change deposition rate profile across the substrate. Plasma density profile is adjusted to change deposition rate profile across the substrate. Chamber surfaces exposed to the plasma are heated to improve plasma density uniformity and reduce formation of low quality deposits on chamber surfaces. In situ metrology may be used to monitor progress of a deposition process and trigger control actions involving substrate temperature profile, plasma density profile, pressure, temperature, and flow of reactants.

Abstract translation: 描述了根据PECVD工艺处理衬底的方法。 调整衬底的温度分布以改变衬底上的沉积速率分布。 调整等离子体密度分布以改变跨衬底的沉积速率分布。 暴露于等离子体的室表面被加热以改善等离子体密度均匀性并减少在室表面上形成低质量的沉积物。 原位计量可用于监测沉积过程的进展并触发涉及衬底温度曲线，等离子体密度分布，压力，温度和反应物流动的控制动作。

公开(公告)号：US20140083361A1

公开(公告)日：2014-03-27

申请号：US14035138

申请日：2013-09-24

Applicant: APPLIED MATERIALS, INC.

Inventor： Juan Carlos ROCHA-ALVAREZ ,  Amit Kumar BANSAL ,  Ganesh BALASUBRAMANIAN ,  Jianhua ZHOU ,  Ramprakash SANKARAKRISHNAN

IPC: C23C16/50 ,  H01L21/67

Abstract: An apparatus for plasma processing a substrate is provided. The apparatus comprises a processing chamber, a substrate support disposed in the processing chamber, and a lid assembly coupled to the processing chamber. The lid assembly comprises a conductive gas distributor such as a face plate coupled to a power source, and a heater coupled to the conductive gas distributor. A zoned blocker plate is coupled to the conductive gas distributor and a cooled gas cap is coupled to the zoned blocker plate. A tuning electrode may be disposed between the conductive gas distributor and the chamber body for adjusting a ground pathway of the plasma. A second tuning electrode may be coupled to the substrate support, and a bias electrode may also be coupled to the substrate support.

Abstract translation: 提供了一种用于等离子体处理衬底的装置。 该装置包括处理室，设置在处理室中的基板支撑件和联接到处理室的盖组件。 盖组件包括导电气体分配器，例如耦合到电源的面板和耦合到导电气体分配器的加热器。 分区阻挡板联接到导电气体分配器，并且冷却的气帽联接到分区阻挡板。 调谐电极可以设置在导电气体分配器和腔体之间，用于调节等离子体的接地路径。 第二调谐电极可以耦合到衬底支撑件，并且偏置电极也可以耦合到衬底支撑件。