Abstract:
A voltage regulator generates an output voltage that is a designed voltage level below the supply voltage. A reference voltage generator generates a reference voltage between ground and supply voltages. A voltage divider generates a feedback voltage between the supply and output voltages. An amplifier generates an amplifier output voltage based on a difference between the reference and feedback voltages. A buffer buffers the amplifier output voltage. A pass transistor receives the buffered voltage at its control node to sink an average load current appearing at the output node. A capacitor is connected between the supply and output voltages to provide a peak load current. A load-current-detecting transistor receives the buffered voltage at its control node to sense the load current. A compensation transistor compensates for leakage current. An internal load converts the sensed load current into a voltage control signal applied to the compensation transistor.
Abstract:
An electrical circuit for providing electrical power for use in powering electronic devices is described herein. The electrical circuit includes a power converter circuit that is electrically coupled to an electrical power source for receiving alternating current (AC) input power from the electrical source and delivering direct current (DC) output power to an electronic device. The power converter circuit includes a transformer and a switching device coupled to a primary side of the transformer for delivering power from the electrical power source to a primary side of the transformer. A controller is coupled to a voltage sensor and the switching device for receiving the sensed voltage level from the voltage sensor and transmitting a control signal to the switching device to adjust the voltage level of power being delivered to the electronic device.
Abstract:
Disclosed is a charge pump protection device including a power supply voltage, a charge pump to produce an output voltage higher than the power supply voltage, the charge pump including, a pumping capacitor to store voltage during a charging state and to discharge the voltage during a pumping state thereof, a plurality of switches to regulate the charging and pumping states, a charge pump capacitor to store the output voltage, and at least one current limiter in series with at least one of the plurality of switches to limit current and prevent an electrical failure of the charge pump.
Abstract:
In accordance with an embodiment, a method of operating a charge pump includes providing a first programmable voltage to a plurality of clock generators having outputs coupled to first nodes of corresponding groups of charge pump capacitors, and selecting a second node of one capacitor from one of the corresponding groups of charge pump capacitors. The clock generators produce a plurality of clock signals having amplitudes proportional to the first programmable voltage.
Abstract:
An electrical circuit for providing electrical power for use in powering electronic devices, such as monitors, televisions, white goods, data centers, and telecom circuit boards, is described herein. The electrical circuit includes a voltage reduction circuit cell that includes a first capacitor, a second capacitor, a switching circuit, and a hold capacitor. The switching circuit includes a plurality of switching devices that are coupled to the first and the second capacitors for delivering power from an input terminal to an output terminal. The plurality of switching devices includes at least two switching devices that are coupled to ground. The voltage reduction circuit cell also includes a controller for operating the switching circuit in a plurality of operational modes to deliver an output power signal at a desired voltage level.
Abstract:
An electrical circuit for providing electrical power for use in powering electronic devices, such as monitors, televisions, white goods, data centers, and telecom circuit boards, is described herein. The electrical circuit includes an input terminal configured to receive an input power signal, an output terminal configured to provide an output power signal, and a plurality of voltage reduction circuit cells coupled between the input terminal and the output terminal. Each of the voltage reduction circuit cells includes a pair of flyback capacitors, a switching circuit, and a hold capacitor. The switching device is configured to operate the corresponding voltage reduction circuit cell at a charging phase and at a discharging phase. The plurality of voltage reduction circuit cells are configured to deliver the output power signal having a voltage level that is less than the voltage level of the input power signal.
Abstract:
A charge pump includes a voltage multiplier core and a clocking circuit. The voltage multiplier core includes first and second cross-coupled CMOS devices, first and second output CMOS devices, a first capacitive node coupled between the first cross-coupled CMOS device and the first output CMOS device, and a second capacitive node coupled between the second cross-couple CMOS device and the second output CMOS device. The clocking circuit configured to control the first and second output CMOS devices to inhibit a drop in respective output voltages there from, while simultaneously controlling the first and second cross-coupled CMOS device and input voltages applied to the first and second capacitive nodes to minimize leakage from the first and second capacitive nodes.
Abstract:
A dynamic random access memory (DRAM) is selectively operable in a sleep mode and another mode. The DRAM has data storage cells that are refreshed in the refresh mode. A boosted voltage is provided for the operation of the DRAM. A boosted voltage provider includes a group of charge pump circuits that are selectively activated by a pump control circuit based on a refresh time for refreshing data in the DRAM cells in the sleep mode.
Abstract:
A system, method, and computer program product for generating a regulated boosted load voltage. A comparator may use reduced versions of a reference voltage, a supply voltage, and a fed-back output load voltage to determine whether the output load voltage requires adjustment. If so, a controller may responsively vary the number of voltage boosting charge pumps connected in parallel to the load to best match a target voltage. The target voltage may be the reference voltage plus the supply voltage. A counter may track the number of active charge pumps, and may increment or decrement the number more slowly than the charge pumps operate. Loop gain may be limited by an integrating filter to prevent oscillation. The embodiments are of particular utility for signal conversion circuitry as they eliminate difficulties arising from gate-source voltage inadequacies and differences in switch transistors. A wider range of reference voltages may be accommodated.
Abstract:
A method of generating a pumping voltage in an integrated circuit includes receiving an external clock signal from outside of the integrated circuit. The frequency of the received external clock signal is changed according to one or more modulation ratios, resulting in one or more respective modulated external clock signal. The external clock signal or one of the modulated external clock signals is then selected for use as a pump clock signal. The pump clock signal is used for driving the pump capacitance of a pump circuit for generating the pumping voltage.