-
公开(公告)号：US09928793B2
公开(公告)日：2018-03-27
申请号：US14785043
申请日：2015-08-10
Inventor： Mang Zhao , Juncheng Xiao , Yong Tian
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/3266 , G09G3/3696 , G09G2300/043 , G09G2310/0267 , G09G2310/0286
Abstract: The present invention provides a scanning driving circuit for executing a driving operation to cascaded scanning lines, the scanning driving circuit includes a pull-down control module, a pull-down module, a reset module, a down link module, a first bootstrap capacitor, a constant low voltage level source, and a constant high voltage level source; wherein a cascading manner of the clock signal is determined according to a scanning order of the scanning driving circuit, for the reset module to pull up the corresponding scanning signal of the scanning line. The structure of the scanning driving circuit of the present invention is simple and highly dependable.
-
公开(公告)号：US20180047759A1
公开(公告)日：2018-02-15
申请号：US14915892
申请日：2016-01-28
IPC: H01L27/12 , G09G3/36 , H01L29/786 , G02F1/1333 , G02F1/1362
CPC classification number: G09G3/3674 , G02F1/13 , G02F1/1333 , G02F1/1362 , G09G3/36 , G09G2310/0286 , G11C19/184 , G11C19/28 , H01L27/1222 , H01L27/1237 , H01L29/78651
Abstract: The invention provides a GOA circuit for narrow border LCD panel, by disposing a first node leakage prevention unit (700) comprised of ninth TFT (T9), tenth TFT (T10) and third capacitor (C3), wherein the ninth TFT (T9) has gate and source connected to the output clock signal (CK) to form a diode structure to charge the third capacitor (C3) and fourth node (H(n)) to high voltage; the tenth TFT (T10) clears the fourth node during stage-propagated signal duration to ensure normal charging for the first node (Q(n)). The GOA circuit is applicable to dual-side progressive scanning architecture and also to dual-side interlaced scanning architecture, and able to prevent current leakage in the first node under dual-side interlaced scanning architecture to ensure stable operation of circuit and improve reliability of GOA circuit. Moreover, with only two clock signals on each side, the invention is suitable for narrow border display panel.
-
公开(公告)号：US09858874B2
公开(公告)日：2018-01-02
申请号：US14783863
申请日：2015-08-27
Inventor： Juncheng Xiao , Mang Zhao
CPC classification number: G09G3/3614 , G09G3/20 , G09G3/30 , G09G3/36 , G09G3/3677 , G09G2310/0232 , G09G2310/0267 , G09G2310/0286 , G09G2330/021 , G11C19/28
Abstract: A scan driving circuit is provided for driving scan line in cascade, including a pull-down controlling module, a pull-down module, a reset-controlling module, a resetting module, a downward-transferring module, a first bootstrap capacitor, a constant low voltage level source, and a constant high voltage level source. By disposing the resetting module, the scan driving circuit of the present invention raises the reliability of the scan driving circuit and simplifies the entire structure of the scan driving circuit.
-
公开(公告)号：US09799295B2
公开(公告)日：2017-10-24
申请号：US14888687
申请日：2015-09-29
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Mang Zhao
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/3696 , G09G2300/0871 , G09G2310/0243 , G09G2310/0281 , G09G2310/0286 , G09G2310/0291 , G09G2310/08
Abstract: The invention provides a scan driving circuit and a liquid crystal display device. The scan driving circuit includes: an input module for calculating a preceding-stage control signal, first and second clock signals to obtain a first control signal; a resetting module for resetting a control signal node according to a reset signal; a latching module for calculating the first control signal, the first and second clock signals to obtain a second control signal; a logic processing module for performing a logic calculation on the second control signal and a third clock signal to obtain a logic control signal; an output module for calculating the logic control signal to obtain a scan driving signal; and a scan line for receiving and transmitting the scan driving signal to a pixel unit, to reset the control signal node and the scan driving signal and thereby avoid the failure of scan driving circuit.
-
公开(公告)号：US09792845B2
公开(公告)日：2017-10-17
申请号：US14777748
申请日：2015-07-17
Inventor： Juncheng Xiao , Mang Zhao , Yao Yan
CPC classification number: G09G3/20 , G09G2300/0408 , G09G2310/0267
Abstract: A scan driving circuit is provided for driving scan lines which are connected in series, including a pull-down controlling module, a pull-down module, a reset-controlling module, a resetting module, a downward-transmitting module, a first bootstrap capacitor, a constant low voltage level source, and a constant high voltage level source. The entire structure of the scan driving circuit is simple, and energy consumption is reduced.
-
Patent Agency Ranking
公开(公告)号：US20240212559A1
公开(公告)日：2024-06-27
申请号：US18149027
申请日：2022-12-30
Inventor： Liu Yang , Qiang Gong , Mang Zhao
IPC: G09G3/20
CPC classification number: G09G3/2074 , G09G2300/0452 , G09G2310/0202 , G09G2310/0297 , G09G2310/08 , G09G2320/0626 , G09G2320/0666
Abstract: Provided are a display panel and an electronic terminal, including pixel units arranged along row and column directions. The pixel unit includes sub-pixels of different colors arranged along the row direction. In a first mode, two adjacent groups of pixel units are simultaneously turned on, and the sub-pixels of a same color in two adjacent columns of pixel units display a same gray scale. In a second mode, a plurality of rows of pixel units are turned on sequentially, and each sub-pixel in a plurality of columns of pixel units displays a corresponding gray scale. The refresh rate of the first mode is greater than that of the second mode, and the resolution of the first mode is smaller than that of the second mode. This shortens the time required for all rows of pixel units to be turned on, thereby increasing the refresh rate.
-
公开(公告)号：US11822200B2
公开(公告)日：2023-11-21
申请号：US16966106
申请日：2020-06-19
Inventor： Yanyang Li , Mang Zhao , Yong Tian
IPC: G02F1/1368 , G06F3/041 , G02F1/1333 , G02F1/1335 , G02F1/1362 , H01L27/12
CPC classification number: G02F1/1368 , G02F1/13338 , G02F1/133514 , G02F1/136286 , G06F3/0412 , G06F3/04164 , H01L27/124
Abstract: A thin film transistor array substrate and a touch display panel are provided, including a plurality of touch electrodes. The touch electrodes include a first touch electrode, a second touch electrode, and a third touch electrode arranged along a first direction. A number of the touch traces electrically connected between the second touch electrode and the first common power line is greater than or equal to a number of the touch traces electrically connected between the first touch electrode and the first common power line, and is less than a number of the touch traces electrically connected between the third touch electrode and the first common power line.
-
公开(公告)号：US11531421B2
公开(公告)日：2022-12-20
申请号：US17260154
申请日：2020-06-17
Inventor： Mang Zhao , Yanyang Li , Yong Tian
IPC: G06F3/041 , G06F3/044 , G02F1/1333 , G02F1/1343 , G02F1/1362 , G02F1/1368 , G02F1/1335
Abstract: The present application provides a thin film transistor array substrate and a touch display panel including a plurality of touch electrodes, and the touch electrodes including a first touch electrode, a second touch electrode, and a third touch electrode arranged in a first direction. A number of touch trace electrically connected to the second touch electrode and the driver chip is greater than or equal to a number of touch trace electrically connected to the first touch electrode and the driver chip, and is less than a number of touch trace electrically connected to the third touch electrode and the driver chip.
-
公开(公告)号：US10916171B2
公开(公告)日：2021-02-09
申请号：US16611225
申请日：2019-08-15
Inventor： Mang Zhao
IPC: G09G3/20
Abstract: A GOA circuit and a display panel. By using a first control clock and a third control clock in a forward and reverse scanning module to control a first node, the GOA circuit is able to avoid leakage of the first node during operation and improve the reliability of GOA circuit.
-
公开(公告)号：US10699660B2
公开(公告)日：2020-06-30
申请号：US15667670
申请日：2017-04-18
Inventor： Mang Zhao
IPC: G09G3/36 , G02F1/1345
Abstract: The present disclosure provides a scan-driving circuit and a liquid crystal display, which comprises a scan-level-signal-output module, a present-stage cascaded-signal-output module, and a present-stage scanning-signal-output module. The scan-level-signal-output module is used for generating a scanning level signal and for performing a latching operation on the scanning level signal. A forward/reverse scanning control signal is used for controlling the scanning drive unit be on a forward-driving mode or a reverse-driving mode.
-
-
-
-
-
-
-
-
-
Search Results
86
records
(took 0.022 seconds)
