公开(公告)号：US09151779B2

公开(公告)日：2015-10-06

申请号：US13675673

申请日：2012-11-13

Applicant: QUALCOMM Incorporated

Inventor： Kyu-Pyung Hwang ,  Young K Song ,  Changhan Hobie Yun ,  Dong Wook Kim

IPC: G01R31/00 ,  G01R1/07

CPC classification number: G01R1/07 ,  G01R31/002

Abstract: Systems and methods for EMC, EMI and ESD testing are described. A probe comprises a center conductor extending along an axis of the probe, a probe tip, and a shield coaxially aligned with the center conductor and configured to provide electromagnetic screening for the probe tip. One or more actuators may change the relative positions of the probe tip and shield with respect to a device under test, thereby enabling control of sensitivity and resolution of the probe.

Abstract translation: 描述了用于EMC，EMI和ESD测试的系统和方法。 探针包括沿着探针的轴线延伸的中心导体，探针尖端和与中心导体同轴对准的屏蔽并且被配置为为探针尖端提供电磁屏蔽。 一个或多个致动器可以相对于被测器件改变探头尖端和屏蔽件的相对位置，从而能够控制探头的灵敏度和分辨率。

公开(公告)号：US20150215026A1

公开(公告)日：2015-07-30

申请号：US14684072

申请日：2015-04-10

Applicant: QUALCOMM Incorporated

Inventor： Chengjie Zuo ,  Changhan Hobie Yun ,  Chi Shun Lo ,  Mario Francisco Velez ,  Jonghae Kim

IPC: H04B7/08 ,  H04B1/18

CPC classification number: H04B7/0805 ,  H04B1/005 ,  H04B1/16 ,  H04B1/18 ,  H04B7/0825

Abstract: A diversity receiver switch includes at least one second stage switch configured to communicate with a transceiver. The diversity receiver switch may also include at least one first stage switch coupled between a diversity receiver antenna and the second stage switch(es). The first stage switch(es) may be configured to handle a different amount of power than the second stage switch(es). The diversity receiver switch may include a bank of second stage switches configured to communicate with a transceiver. A first stage switch may be configured to handle more power than each switch in the bank of second stage switches. Alternatively, the diversity receiver switch include a bank of first stage switches coupled between the diversity receiver antenna and a second stage switch. The second stage switch may be configured to handle more power than each of the first stage switches.

Abstract translation: 分集接收机交换机包括被配置为与收发机通信的至少一个第二级交换机。 分集接收机交换机还可以包括耦合在分集接收机天线和第二级交换机之间的至少一个第一级交换机。 第一级开关可以被配置为处理与第二级开关不同的功率量。 分集接收器开关可以包括被配置为与收发器通信的一组第二级交换机。 第一级开关可以被配置为处理比第二级开关组中的每个开关更多的功率。 或者，分集接收器开关包括耦合在分集接收器天线和第二级开关之间的一组第一级开关。 第二级开关可以被配置为处理比每个第一级开关更多的功率。

公开(公告)号：US20150180437A1

公开(公告)日：2015-06-25

申请号：US14177620

申请日：2014-02-11

Applicant: QUALCOMM Incorporated

Inventor： Chengjie Zuo ,  Mario Francisco Velez ,  Jonghae Kim ,  Daeik Daniel Kim ,  Changhan Hobie Yun

IPC: H03H7/01

CPC classification number: H03H7/0115 ,  H01F27/2866 ,  H01L23/5223 ,  H01L23/5227 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48464 ,  Y10T29/417 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An inductor is provided on a substrate that includes a capacitor. The inductor comprises a series of wire loops. An end of the wire loop is wire bonded to the capacitor.

Abstract translation: 在包括电容器的基板上设置电感器。 电感器包括一系列线圈。 导线环的末端引线接合到电容器。

公开(公告)号：US20150084653A1

公开(公告)日：2015-03-26

申请号：US14038608

申请日：2013-09-26

Applicant: QUALCOMM Incorporated

Inventor： Young K. Song ,  Kyu-Pyung Hwang ,  Dong Wook Kim ,  Changhan Hobie Yun

IPC: G01R27/02 ,  G01R31/28

CPC classification number: G01R27/02

Abstract: A method and apparatus for testing integrated circuit resistors includes applying a variable source current to a resistive device under test (DUT), measuring the resistance of the resistive DUT as a function of the source current, and fitting the measured resistance to parameters of a polynomial parametric equation, wherein the parametric equation comprises a constant resistance at zero current bias plus a second order current coefficient of resistance multiplied by the square of the current.

Abstract translation: 用于测试集成电路电阻的方法和装置包括将可变源电流施加到被测电阻器件（DUT），测量作为源电流的函数的电阻DUT的电阻，并将测得的电阻拟合到多项式的参数 参数方程式，其中参数方程包括零电流偏置处的恒定电阻加上电阻乘以电流平方的二阶电流电流系数。

公开(公告)号：US08987872B2

公开(公告)日：2015-03-24

申请号：US13794487

申请日：2013-03-11

Applicant: QUALCOMM Incorporated

Inventor： Kyu-Pyung Hwang ,  Young Kyu Song ,  Dong Wook Kim ,  Changhan Hobie Yun

IPC: H01L23/552 ,  H01L21/82 ,  H01L25/065 ,  H05K9/00 ,  H01L23/66 ,  H01L23/00

CPC classification number: H01L23/552 ,  H01L21/82 ,  H01L23/66 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/48 ,  H01L25/0652 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16245 ,  H01L2224/17515 ,  H01L2224/48227 ,  H01L2225/06517 ,  H01L2225/06537 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19105 ,  H05K9/0007 ,  H01L2924/014 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: One feature pertains to a multi-chip package that includes a substrate and an electromagnetic interference (EMI) shield coupled to the substrate. At least one integrated circuit is coupled to a first surface of the substrate. The EMI shield includes a metal casing configured to shield the package from radio frequency radiation, a dielectric layer coupled to at least a portion of an inner surface of the metal casing, and a plurality of signal lines. The signal lines are coupled to the dielectric layer and electrically isolated from the metal casing by the dielectric layer. At least one other integrated circuit is coupled to an inner surface of the EMI shield, and at least a portion of the inner surface of the EMI shield faces the first surface of the substrate. The signal lines are configured to provide electrical signals to the second circuit component.

Abstract translation: 一个特征涉及包括衬底和耦合到衬底的电磁干扰（EMI）屏蔽）的多芯片封装。 至少一个集成电路耦合到衬底的第一表面。 EMI屏蔽包括被配置为将封装与射频辐射屏蔽的金属外壳，耦合到金属外壳的内表面的至少一部分的电介质层和多个信号线。 信号线耦合到电介质层，并通过电介质层与金属外壳电隔离。 至少一个其它集成电路耦合到EMI屏蔽的内表面，并且EMI屏蔽的内表面的至少一部分面向基板的第一表面。 信号线被配置为向第二电路部件提供电信号。

公开(公告)号：US12009292B2

公开(公告)日：2024-06-11

申请号：US17547093

申请日：2021-12-09

Applicant: QUALCOMM Incorporated

Inventor： Nosun Park ,  Changhan Hobie Yun ,  Daniel Daeik Kim ,  Paragkumar Ajaybhai Thadesar ,  Sameer Sunil Vadhavkar

IPC: H01L23/522 ,  H01L49/02

CPC classification number: H01L23/5223 ,  H01L23/5227 ,  H01L28/10 ,  H01L28/40

Abstract: An integrated circuit (IC) includes a substrate and a first metal-insulator-metal (MIM) capacitor. The first MIM capacitor includes a first plate comprising a first metallization layer on a surface of the substrate. The first MIM capacitor also includes a first MIM insulator layer on a first portion of a surface of the first plate, a sidewall of the first plate, and a first portion of the surface of the substrate. The first MIM capacitor further includes a second plate on the first MIM insulator layer and on a second portion of the surface of the substrate, the second plate comprising a second metallization layer. The IC also includes an inductor comprising a portion of the second plate on the second portion of the surface of the substrate.

公开(公告)号：US11770115B2

公开(公告)日：2023-09-26

申请号：US17235131

申请日：2021-04-20

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  Hannu Laurila ,  Ville Lehtisalo ,  Ville Herman Brunou ,  Daniel Daeik Kim ,  Paragkumar Ajaybhai Thadesar ,  Nosun Park ,  Wei Cheng

IPC: H03J3/20 ,  H03H3/00 ,  H04B1/18 ,  H03H7/01

CPC classification number: H03J3/20 ,  H03H3/00 ,  H03H7/0123 ,  H04B1/18

Abstract: An exemplary tunable circuit includes an inductor coupled to a node and a first capacitor coupled to the node. The tunable circuit also includes a variable capacitor coupled to the node, such that a total capacitance of the tunable circuit depends on a fixed capacitance of the first capacitor and a variable capacitance of the variable capacitor. In an example, the inductor and the first capacitor are both included in a passive device and the variable capacitor is in a semiconductor device. The variable capacitor allows the total capacitance to be modified for the purpose of, for example, calibrating the capacitance to account for manufacturing variations, and/or adjusting to a frequency range of operation used by wireless devices in a region of the world. The first capacitor may be a higher quality capacitor providing a larger portion of the total capacitance than the variable capacitor.

公开(公告)号：US20220123735A1

公开(公告)日：2022-04-21

申请号：US17235131

申请日：2021-04-20

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  Hannu Laurila ,  Ville Lehtisalo ,  Ville Herman Brunou ,  Daniel Daeik Kim ,  Paragkumar Ajaybhai Thadesar ,  Nosun Park ,  Wei Cheng

IPC: H03J3/20 ,  H03H7/01 ,  H04B1/18 ,  H03H3/00

Abstract: An exemplary tunable circuit includes an inductor coupled to a node and a first capacitor coupled to the node. The tunable circuit also includes a variable capacitor coupled to the node, such that a total capacitance of the tunable circuit depends on a fixed capacitance of the first capacitor and a variable capacitance of the variable capacitor. In an example, the inductor and the first capacitor are both included in a passive device and the variable capacitor is in a semiconductor device. The variable capacitor allows the total capacitance to be modified for the purpose of, for example, calibrating the capacitance to account for manufacturing variations, and/or adjusting to a frequency range of operation used by wireless devices in a region of the world. The first capacitor may be a higher quality capacitor providing a larger portion of the total capacitance than the variable capacitor.

公开(公告)号：US11024454B2

公开(公告)日：2021-06-01

申请号：US15191203

申请日：2016-06-23

Applicant: QUALCOMM Incorporated

Inventor： Daeik Daniel Kim ,  Mario Francisco Velez ,  Changhan Hobie Yun ,  Niranjan Sunil Mudakatte ,  Jonghae Kim ,  Chengjie Zuo ,  David Francis Berdy

IPC: H01F5/00 ,  H01F27/28 ,  H01F41/04 ,  H03H7/01 ,  H03F15/00 ,  H01F17/00 ,  H01F27/24

Abstract: Disclosed is an inductor device including a first curved metal plate, a second curved metal plate below and substantially vertically aligned with the first curved metal plate, and a first elongated via vertically aligned between the first curved metal plate and the second curved metal plate, the first elongated via configured to conductively couple the first curved metal plate to the second curved metal plate and having an aspect ratio of a width to a height of the first elongated via of at least approximately 2 to 1.

公开(公告)号：US10582609B2

公开(公告)日：2020-03-03

申请号：US15798071

申请日：2017-10-30

Applicant: QUALCOMM Incorporated

Inventor： Changhan Hobie Yun ,  Jonghae Kim ,  Xiaoju Yu ,  Mario Francisco Velez ,  Wei-Chuan Chen ,  Niranjan Sunil Mudakatte ,  Matthew Michael Nowak ,  Christian Hoffmann ,  Rodrigo Pacher Fernandes ,  Manuel Hofer ,  Peter Bainschab ,  Edgar Schmidhammer ,  Stefan Leopold Hatzl

IPC: H05K1/02 ,  H05K3/32 ,  H03H9/02 ,  H03H9/10 ,  H03H3/02 ,  H03H9/05 ,  H03H3/08

Abstract: A passive on glass (POG) on filter capping apparatus may include an acoustic filter die. The apparatus may further include a capping die electrically coupled to the acoustic filter die. The capping die may include a 3D inductor.