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    Packaging substrate with block-type via and semiconductor packages having the same
    43.
    发明授权
    Packaging substrate with block-type via and semiconductor packages having the same 有权

    公开(公告)号：US10340199B2

    公开(公告)日：2019-07-02

    申请号：US14925982

    申请日：2015-10-29

    Applicant: MEDIATEK INC.

    Inventor： Wen-Sung Hsu ,  Tai-Yu Chen

    IPC: H01L23/24 ,  H01L23/34 ,  H01L23/367 ,  H01L23/498 ,  H01L23/50 ,  H01L25/03 ,  H01L25/10 ,  H01L23/31 ,  H01L23/00

    Abstract: A packaging substrate includes a core layer having a first surface and a second surface. A group of ground pads is disposed on the second surface within a central region. A group of first power pads is disposed on the second surface within the central region. A plurality of signal pads is disposed on the second surface within a peripheral region that encircles the central region on the second surface. A first block-type via is embedded in the core layer within the central region. The group of ground pads is electrically connected to the first block-type via. A second block-type via is embedded in the core layer within the central region. The group of first power pads is electrically connected to the second block-type via.

    SEMICONDUCTOR PACKAGE HAVING A STIFFENER RING
    44.
    发明申请
    SEMICONDUCTOR PACKAGE HAVING A STIFFENER RING 审中-公开

    公开(公告)号：US20190115269A1

    公开(公告)日：2019-04-18

    申请号：US16217016

    申请日：2018-12-11

    Applicant: MEDIATEK INC.

    Inventor： Chi-Wen Pan ,  I-Hsuan Peng ,  Sheng-Liang Kuo ,  Yi-Jou Lin ,  Tai-Yu Chen

    IPC: H01L23/16 ,  H01L23/367 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065

    Abstract: A semiconductor package includes a package substrate having a top surface and a bottom surface, and a stiffener ring mounted on the top surface of the package substrate. The stiffener ring includes a reinforcement rib that is coplanar with the stiffener ring on the top surface of the package substrate. At least two compartments are defined by the stiffener ring and the reinforcement rib. At least two individual chip packages are mounted on chip mounting regions within the at least two compartments, respectively, thereby constituting a package array on the package substrate.

    Thermal control method and thermal control system
    46.
    发明授权
    Thermal control method and thermal control system 有权
    热控制方法和热控系统

    公开(公告)号：US09521246B2

    公开(公告)日：2016-12-13

    申请号：US14670418

    申请日：2015-03-27

    Applicant: MEDIATEK INC.

    Inventor： Jih-Ming Hsu ,  Wei-Ting Wang ,  Wen-Tsan Hsieh ,  Tai-Yu Chen ,  Chia-Feng Yeh ,  Chien-Tse Fang

    IPC: H04M1/725 ,  G06F1/20

    CPC classification number: H04M1/72569 ,  G06F1/206 ,  H04M1/72525 ,  H04M1/72577

    Abstract: The invention provides a thermal control method and a thermal control system. The thermal control method comprises: detecting a temperature variance of a component of the electronic device to generate a detecting result; and determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result. The thermal control system comprises: a detecting unit, for detecting a temperature variance of a component of the electronic device to generate a detecting result; and a determining unit, for determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result.

    Abstract translation: 本发明提供一种热控制方法和热控制系统。 热控制方法包括：检测电子设备的部件的温度变化以产生检测结果; 以及根据检测结果确定集成电路的温度阈值作为节流点。 热控制系统包括：检测单元，用于检测电子设备的部件的温度变化以产生检测结果; 以及确定单元，用于根据检测结果将集成电路的温度阈值确定为节流点。

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