公开(公告)号：US11169194B2

公开(公告)日：2021-11-09

申请号：US16799152

申请日：2020-02-24

申请人： Intel Corporation

发明人： Xiaoning Ye ,  Kai Xiao

IPC分类号： G01R27/28

摘要： Technologies for verifying a de-embedder for interconnect measurement include a verification compute device. The verification compute device is to measure a first signal transmitted through a single device under test and measure a second signal transmitted through a duplicated set of devices under test. Each device under test in the duplicated set is substantially identical to the single device under test. Additionally, the verification compute device is to apply a de-embedder to the measured first signal to remove an effect of test fixtures on the measured first signal, apply the de-embedder to the measured second signal to remove the effect of the test fixtures on the measured second signal, concatenate the de-embedded first signal with itself to generate a concatenated de-embedded first signal, and compare the concatenated de-embedded first signal with the de-embedded second signal to determine whether the concatenated de-embedded first signal matches the de-embedded second signal.

公开(公告)号：US20210263742A1

公开(公告)日：2021-08-26

申请号：US17195132

申请日：2021-03-08

申请人： Intel Corporation

发明人： Altug Koker ,  Michael Apodaca ,  Kai Xiao ,  Chandrasekaran Sakthivel ,  Jeffery S. Boles ,  Adam T. Lake ,  Abhishek R. Appu

IPC分类号： G06F9/30 ,  G06F9/50 ,  G06T15/00 ,  G09G5/36 ,  G06T1/20

摘要： Systems, apparatuses and methods may provide for technology that activates a first context on a graphics processor and detects a context switch condition with respect to the first context. Additionally, a second context may be activated, in response to the context switch condition, on the graphics processor while the first context is active on the graphics processor. In one example, activating the second context includes adding a group identifier to a plurality of threads corresponding to the second context and launching the plurality of threads with the group identifier on the graphics processor.

公开(公告)号：US10965047B2

公开(公告)日：2021-03-30

申请号：US16431498

申请日：2019-06-04

申请人： Intel Corporation

发明人： Jong-Ru Guo ,  Yunhui Chu ,  Jun Liao ,  Kai Xiao ,  Jingbo Li ,  Yuanhong Zhao ,  Mo Liu ,  Beomtaek Lee ,  James A. McCall ,  Jaejin Lee ,  Xiaoning Ye ,  Zuoguo Wu ,  Xiang Li

IPC分类号： H05K7/00 ,  H01R12/71 ,  H01R13/66 ,  H01R103/00

摘要： Embodiments may relate to a connector. The connector may include a plurality of connector pins that are to communicatively couple an element of a printed circuit board (PCB) with an element of an electronic device when the element of the PCB and the element of the electronic device are coupled with the connector. The connector may also include an active circuit that is communicatively coupled with a pin of the plurality of pins. The active circuit may be configured to match an impedance of the element of the PCB with an impedance of the element of the electronic device. Other embodiments may be described or claimed.

公开(公告)号：US10942740B2

公开(公告)日：2021-03-09

申请号：US16794973

申请日：2020-02-19

申请人： Intel Corporation

发明人： Altug Koker ,  Michael Apodaca ,  Kai Xiao ,  Chandrasekaran Sakthivel ,  Jeffery S. Boles ,  Adam T. Lake ,  Abhishek R. Appu

IPC分类号： G06F9/30 ,  G06F9/50 ,  G06T15/00 ,  G09G5/36 ,  G06T1/20

摘要： Systems, apparatuses and methods may provide for technology that activates a first context on a graphics processor and detects a context switch condition with respect to the first context. Additionally, a second context may be activated, in response to the context switch condition, on the graphics processor while the first context is active on the graphics processor. In one example, activating the second context includes adding a group identifier to a plurality of threads corresponding to the second context and launching the plurality of threads with the group identifier on the graphics processor.

公开(公告)号：US20210035270A1

公开(公告)日：2021-02-04

申请号：US16929787

申请日：2020-07-15

申请人： Intel Corporation

发明人： Tomer Bar-On ,  Hugues Labbe ,  Adam T. Lake ,  Kai Xiao ,  Ankur N. Shah ,  Johannes Guenther ,  Abhishek R. Appu ,  Joydeep Ray ,  Deepak S. Vembar ,  ElMoustapha Ould-Ahmed-Vall

IPC分类号： G06T5/00 ,  G06T15/50 ,  G06T15/00 ,  G06T1/20 ,  G06T9/00 ,  G06T11/40

摘要： Systems, apparatuses and methods may provide for technology that identifies, at an image post-processor, unresolved surface data and identifies, at the image post-processor, control data associated with the unresolved surface data. Additionally, the technology may resolve, at the image post-processor, the unresolved surface data and the control data into a final image.

公开(公告)号：US10893299B2

公开(公告)日：2021-01-12

申请号：US16050391

申请日：2018-07-31

申请人： Intel Corporation

发明人： Jill Boyce ,  Scott Janus ,  Itay Kaufman ,  Archie Sharma ,  Stanley Baran ,  Michael Apodaca ,  Prasoonkumar Surti ,  Srikanth Potluri ,  Barnan Das ,  Hugues Labbe ,  Jong Dae Oh ,  Gokcen Cilingir ,  Maria Bortman ,  Tzach Ashkenazi ,  Jonathan Distler ,  Atul Divekar ,  Mayuresh M. Varerkar ,  Narayan Biswal ,  Nilesh V. Shah ,  Atsuo Kuwahara ,  Kai Xiao ,  Jason Tanner ,  Jeffrey Tripp

IPC分类号： H04N19/90 ,  H04N21/218 ,  G06T7/557 ,  G06T19/00 ,  G06T1/20 ,  G06T7/90

摘要： An apparatus to facilitate processing video bit stream data is disclosed. The apparatus includes one or more processors to encode surface normals data with point cloud geometry data included in the video bit stream data for reconstruction of objects within the video bit stream data based on the surface normals data and a memory communicatively coupled to the one or more processors.

公开(公告)号：US20200334896A1

公开(公告)日：2020-10-22

申请号：US16865587

申请日：2020-05-04

申请人： Intel Corporation

发明人： Prasoonkumar Surti ,  Karthik Vaidyanathan ,  Atsuo Kuwahara ,  Hugues Labbe ,  Sameer Kp ,  Jonathan Kennedy ,  Abhishek R. Appu ,  Jeffery S. Boles ,  Balaji Vembu ,  Michael Apodaca ,  Slawomir Grajewski ,  Gabor Liktor ,  David M. Cimini ,  Andrew T. Lauritzen ,  Travis T. Schluessler ,  Murali Ramadoss ,  Abhishek Venkatesh ,  Joydeep Ray ,  Kai Xiao ,  Ankur N. Shah ,  Altug Koker

IPC分类号： G06T15/40 ,  G06T1/20 ,  G06T15/30 ,  G06T15/00 ,  G06T11/40 ,  G06T17/20

摘要： The systems, apparatuses and methods may provide a way to adaptively process and aggressively cull geometry data. Systems, apparatuses and methods may provide for processing, by a positional only shading pipeline (POSH), geometry data including surface triangles for a digital representation of a scene. More particularly, systems, apparatuses and methods may provide a way to identify surface triangles in one or more exclusion zones and non-exclusion zones, and cull surface triangles surface triangles in one or more exclusion zones.

公开(公告)号：US10762592B2

公开(公告)日：2020-09-01

申请号：US16050595

申请日：2018-07-31

申请人： Intel Corporation

发明人： Kai Xiao ,  Gokcen Cilingir ,  Jason Tanner ,  Sang-Hee Lee ,  Atsuo Kuwahara

IPC分类号： G06T1/20 ,  G06T15/00 ,  G06F17/18 ,  G06T15/80

摘要： Embodiments described herein provide an apparatus comprising a processor to divide a first projection into a plurality of regions, the plurality of regions comprising a plurality of pixels, detect errant visual content in a first region in the plurality of regions, determine a detail frequency rating for the first region, and apply one of a first rendering technique to the first region in the plurality of regions when the detail frequency rating for the first region in the plurality of regions fails to meet a detail frequency threshold or a second rendering technique to the first region in the plurality of regions when the detail frequency rating for the first region in the plurality of regions meets a detail frequency threshold. Other embodiments may be described and claimed.

公开(公告)号：US20200218330A1

公开(公告)日：2020-07-09

申请号：US16819385

申请日：2020-03-16

申请人： Intel Corporation

发明人： Travis T. Schluessler ,  Joydeep Ray ,  John H. Feit ,  Nikos Kaburlasos ,  Jacek Kwiatkowski ,  Abhishek R. Appu ,  Kamal Sinha ,  James M. Holland ,  Pattabhiraman K. ,  Sayan Lahiri ,  Radhakrishnan Venkataraman ,  Carson Brownlee ,  Vivek Tiwari ,  Kai Xiao ,  Jefferson Amstutz ,  Deepak S. Vembar ,  Ankur N. Shah ,  ElMoustapha Ould-Ahmed-Vall

IPC分类号： G06F1/3218 ,  G06T1/20 ,  G06F1/3234 ,  G06F9/46

摘要： An embodiment may include an application processor, persistent storage media coupled to the application processor, and a graphics subsystem coupled to the application processor. The system may further include any of a performance analyzer to analyze a performance of the graphics subsystem to provide performance analysis information, a content-based depth analyzer to analyze content to provide content-based depth analysis information, a focus analyzer to analyze a focus area to provide focus analysis information, an edge analyzer to provide edge analysis information, a frame analyzer to provide frame analysis information, and/or a variance analyzer to analyze respective amounts of variance for the frame. The system may further include a workload adjuster to adjust a workload of the graphics subsystem based on the analysis information. Other embodiments are disclosed and claimed.

公开(公告)号：US20200210238A1

公开(公告)日：2020-07-02

申请号：US16726341

申请日：2019-12-24

申请人： Intel Corporation

发明人： Abhishek R Appu ,  Altug Koker ,  Balaji Vembu ,  Joydeep Ray ,  Kamal Sinha ,  Prasoonkumar Surti ,  Kiran C. Veernapu ,  Subramaniam Maiyuran ,  Sanjeev S. Jahagirdar ,  Eric J. Asperheim ,  Guei-Yuan Lueh ,  David Puffer ,  Wenyin Fu ,  Nikos Kaburlasos ,  Bhushan M. Borole ,  Josh B. Mastronarde ,  Linda L. Hurd ,  Travis T. Schluessler ,  Tomasz Janczak ,  Abhishek Venkatesh ,  Kai Xiao ,  Slawomir Grajewski

IPC分类号： G06F9/50 ,  G06T15/00 ,  G06T1/60 ,  G06T1/20 ,  G06F9/48 ,  G06F1/329

摘要： In an example, an apparatus comprises a plurality of execution units comprising at least a first type of execution unit and a second type of execution unit and logic, at least partially including hardware logic, to analyze a workload and assign the workload to one of the first type of execution unit or the second type of execution unit. Other embodiments are also disclosed and claimed.