公开(公告)号：US20090261474A1

公开(公告)日：2009-10-22

申请号：US12496176

申请日：2009-07-01

Applicant: Hyun-Soo Chung ,  Ho-Jin Lee ,  Dong-Hyun Jang ,  Dong-Ho Lee

Inventor： Hyun-Soo Chung ,  Ho-Jin Lee ,  Dong-Hyun Jang ,  Dong-Ho Lee

IPC: H01L23/488 ,  H01L23/535

CPC classification number: H01L25/0657 ,  H01L21/76898 ,  H01L23/481 ,  H01L25/50 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/13025 ,  H01L2224/274 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/01079 ,  H01L2924/01087

Abstract: In a semiconductor device package having a stress relief spacer, and a manufacturing method thereof, metal interconnect fingers extend from the body of a chip provide for chip interconnection. The metal fingers are isolated from the body of the chip by a stress-relief spacer. In one example, such isolation takes the form of an air gap. In another example, such isolation takes the form of an elastomer material. In either case, mismatch in coefficient of thermal expansion between the metal interconnect fingers and the body of the chip is avoided, alleviating the problems associated with cracking and delamination, and leading to improved device yield and device reliability.

Abstract translation: 在具有应力消除间隔物的半导体器件封装及其制造方法中，从芯片本体延伸的金属互连指状物提供芯片互连。 金属手指通过应力消除间隔物与芯片的主体隔离。 在一个示例中，这种隔离采取气隙的形式。 在另一个实例中，这种隔离采用弹性体材料的形式。 在这两种情况下，都避免了金属互连指和芯体之间的热膨胀系数的不匹配，从而减轻了与开裂和分层相关的问题，从而提高了器件的产量和器件的可靠性。

公开(公告)号：US20090244450A1

公开(公告)日：2009-10-01

申请号：US12474192

申请日：2009-05-28

Applicant: Young-Joon Rhee ,  Dong-Ho Lee ,  Chung-Hyo Lee

Inventor： Young-Joon Rhee ,  Dong-Ho Lee ,  Chung-Hyo Lee

IPC: G02F1/1335

CPC classification number: G02F1/1362 ,  G02F2001/136222

Abstract: Thin film transistors are formed on a lower substrate, and red, green, blue and transparent color filters are formed thereon. An organic insulating layer is formed on the color filters, and pixel electrodes are formed thereon. A black matrix and a common electrode are formed on an upper substrate facing the lower substrate.

Abstract translation: 薄膜晶体管形成在下基板上，并且在其上形成红，绿，蓝和透明滤色器。 在滤色片上形成有机绝缘层，在其上形成像素电极。 在面向下基板的上基板上形成黑矩阵和公共电极。

公开(公告)号：US07586182B2

公开(公告)日：2009-09-08

申请号：US11289665

申请日：2005-11-28

Applicant: Seung-Duk Baek ,  Sun-Won Kang ,  Sang-Wook Park ,  Dong-Ho Lee ,  Jong-Joo Lee

Inventor： Seung-Duk Baek ,  Sun-Won Kang ,  Sang-Wook Park ,  Dong-Ho Lee ,  Jong-Joo Lee

IPC: H01L23/48 ,  H01L23/52

CPC classification number: H01L23/49833 ,  H01L23/3128 ,  H01L24/48 ,  H01L25/03 ,  H01L25/0657 ,  H01L2224/06135 ,  H01L2224/06136 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2225/0651 ,  H01L2225/0652 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2225/06596 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Aspects of the subject matter described herein relate to a packaged semiconductor die which becomes a component of a finished multi-chip package. The packaged semiconductor die comprises a die substrate, a semiconductor package, and a sealant. The die substrate includes an insulating substrate and a circuit pattern formed on the insulating substrate. The semiconductor package has a semiconductor chip electrically coupled to the circuit pattern that is a known good package and is coupled to the die substrate. The sealant seals the semiconductor package. The packaged semiconductor die utilizes a known good package which has passed a series of package tests.

Abstract translation: 本文描述的主题的方面涉及成为成品多芯片封装的部件的封装半导体管芯。 封装的半导体管芯包括管芯衬底，半导体封装和密封剂。 芯片基板包括绝缘基板和形成在绝缘基板上的电路图案。 半导体封装具有电耦合到电路图案的半导体芯片，该电路图案是已知的良好封装并且耦合到管芯衬底。 密封剂密封半导体封装。 封装的半导体管芯使用已经通过一系列封装测试的已知的良好封装。

公开(公告)号：US07585700B2

公开(公告)日：2009-09-08

申请号：US11424055

申请日：2006-06-14

Applicant: Jung-Jin Kim ,  Young-Hee Song ,  Dong-Ho Lee

Inventor： Jung-Jin Kim ,  Young-Hee Song ,  Dong-Ho Lee

IPC: H01L21/44 ,  H01L21/48

CPC classification number: H01L23/3128 ,  H01L24/45 ,  H01L24/48 ,  H01L25/105 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2225/1023 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/05599 ,  H01L2924/00 ,  H01L2924/00012

Abstract: Disclosed herein is a ball grid array (BGA) package stack that is not limited by ball arrangement because it utilizes a foldable circuit substrate, which permits interconnection between upper and lower individual BGA packages. The foldable circuit substrate has three portions. By bending the middle second portion, the foldable circuit substrate is folded in two. In the lower BGA package, an IC chip is attached on and electrically connected to a top surface of the first portion, and external connection terminals such as solder balls are formed on a bottom surface of the first portion. The top surface of the first portion is covered with a molding resin to protect the chip, and the third portion is placed on an upper surface of the molding resin. The upper BGA package is constructed in a similar manner to the lower BGA package as described above. For stacking, the interconnection terminals of the upper BGA package are joined and electrically connected to the third portion of the foldable circuit substrate of the lower BGA package.

Abstract translation: 本文公开了一种球栅阵列（BGA）封装堆叠，其不受球布置的限制，因为它利用可折叠电路基板，其允许上部和下部单个BGA封装之间的互连。 可折叠电路基板具有三个部分。 通过弯曲中间第二部分，可折叠电路基板折叠成两个。 在较低的BGA封装中，IC芯片附着在电连接到第一部分的顶表面上，并且在第一部分的底表面上形成诸如焊球的外部连接端子。 第一部分的顶表面被模制树脂覆盖以保护芯片，并且第三部分被放置在模制树脂的上表面上。 上部BGA封装以与上述较低BGA封装类似的方式构造。 为了堆叠，上部BGA封装的互连端子被接合并电连接到下部BGA封装的可折叠电路基板的第三部分。

公开(公告)号：US07545027B2

公开(公告)日：2009-06-09

申请号：US11448772

申请日：2006-06-08

Applicant: Hyun-Soo Chung ,  In-Young Lee ,  Dong-Hyeon Jang ,  Myeong-Soon Park ,  Dong-Ho Lee

Inventor： Hyun-Soo Chung ,  In-Young Lee ,  Dong-Hyeon Jang ,  Myeong-Soon Park ,  Dong-Ho Lee

IPC: H01L23/02

CPC classification number: H01L23/3114 ,  H01L23/525 ,  H01L24/02 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/0401 ,  H01L2224/10126 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/3025

Abstract: A wafer level package may include a semiconductor substrate supporting an electrode pad. A first insulating layer may be provided on the semiconductor substrate. The first insulating layer may include a first opening through which the electrode pad may be exposed. A seed metal layer may be provided on an entire surface of the first insulating layer. A redistribution interconnection metal layer may be provided on the seed metal layer. A second insulating layer may be provided on the redistribution interconnection metal layer. The second insulating layer may have a second opening spaced from the first opening to expose a portion of the redistribution interconnection metal layer. The second insulating layer may surround the redistribution interconnection metal layer. An unwanted portion of seed metal layer may be removed using the second insulating layer as an etch mask.

Abstract translation: 晶片级封装可以包括支撑电极焊盘的半导体衬底。 第一绝缘层可以设置在半导体衬底上。 第一绝缘层可以包括第一开口，电极焊盘可以暴露在第一开口中。 种子金属层可以设置在第一绝缘层的整个表面上。 再分布互连金属层可以设置在种子金属层上。 第二绝缘层可以设置在再分布互连金属层上。 第二绝缘层可以具有与第一开口间隔开的第二开口，以暴露再分布互连金属层的一部分。 第二绝缘层可以包围再分布互连金属层。 可以使用第二绝缘层作为蚀刻掩模去除种子金属层的不需要的部分。

公开(公告)号：US07522145B2

公开(公告)日：2009-04-21

申请号：US10183129

申请日：2002-06-26

Applicant: Dong-Ho Lee ,  Jin Jeon

Inventor： Dong-Ho Lee ,  Jin Jeon

IPC: G09G3/36

CPC classification number: G11C19/28 ,  G02F1/1345 ,  G02F2001/13456 ,  G09G3/3648 ,  G09G3/3677 ,  G09G2310/0281 ,  G11C8/04 ,  G11C19/00 ,  G11C19/184

Abstract: A liquid crystal display apparatus is disclosed. A plurality of pixel electrodes are arranged on a display region of a substrate in a matrix form having a plurality of column lines and a plurality of row lines. Each of a plurality of thin film transistors has a first current electrode connected to a corresponding one of the plurality of pixel electrodes. Each of a plurality of data lines is arranged between odd column line and even column line of a pair of the plurality of column lines and is connected to second current electrodes of thin film transistors which are coupled to odd column line and even column line of the pair. Each of a plurality of first gate lines is connected to gate electrodes of odd thin film transistors which are coupled to one of the plurality of row lines. Each of a plurality of second gate lines is connected to gate electrodes of even thin film transistors which is coupled to the one of the plurality of row lines. A data driving circuit is provided for driving the data lines. At least two gate driving circuits having a first gate driving circuit and a second gate driving circuit are provided, wherein the first gate driving circuit is connected to the plurality of first gate lines and the second gate driving circuit is connected to the plurality of second gate lines.

Abstract translation: 公开了一种液晶显示装置。 多个像素电极以具有多个列线和多条行线的矩阵形式布置在基板的显示区域上。 多个薄膜晶体管中的每一个具有连接到多个像素电极中对应的一个像素电极的第一电流电极。 多条数据线中的每条数据线被布置在多条列线对中的奇数列线和偶数列线之间，并连接到薄膜晶体管的第二电流电极，薄膜晶体管耦合到奇数列线和偶数列线 对。 多个第一栅极线中的每一个连接到耦合到多个行线之一的奇数薄膜晶体管的栅电极。 多个第二栅极线中的每一个连接到耦合到多个行线中的一个的偶数薄膜晶体管的栅电极。 提供数据驱动电路用于驱动数据线。 提供具有第一栅极驱动电路和第二栅极驱动电路的至少两个栅极驱动电路，其中第一栅极驱动电路连接到多个第一栅极线，第二栅极驱动电路连接到多个第二栅极 线条。

公开(公告)号：US20070228546A1

公开(公告)日：2007-10-04

申请号：US11797592

申请日：2007-05-04

Applicant: Byung-Se So ,  Dong-Ho Lee

Inventor： Byung-Se So ,  Dong-Ho Lee

IPC: H01L23/52

CPC classification number: H01L25/0657 ,  H01L2224/05009 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01025 ,  H01L2924/01055 ,  H01L2924/15311 ,  H01L2224/05599 ,  H01L2224/05099

Abstract: A multi-chip package includes first through Nth semiconductor chips, each of which includes an input/output pad, an input/output driver coupled to the input/output pad, and an internal circuit. Each of the first through Nth semiconductor chips includes an internal pad for coupling the internal input/output driver and the internal circuit. The input/output pad of the first semiconductor chip directly receives an input/output signal via a corresponding pin of the multi-chip package. The second through Nth semiconductor chips indirectly receive the input/output signal via the internal pads coupled to each other. The multi-chip package can improve signal compatibility by maintaining a parasitic load of a pin to at least the level of a single chip, when a signal is transmitted to the pin at high speed.

Abstract translation: 多芯片封装包括第一至第N个半导体芯片，每个半导体芯片包括输入/​​输出焊盘，耦合到输入/输出焊盘的输入/输出驱动器和内部电路。 第一至第N半导体芯片中的每一个包括用于耦合内部输入/输出驱动器和内部电路的内部焊盘。 第一半导体芯片的输入/输出焊盘通过多芯片封装的相应引脚直接接收输入/输出信号。 第二至第N半导体芯片通过彼此耦合的内部焊盘间接接收输入/输出信号。 当信号以高速传输到引脚时，多芯片封装可以通过将引脚的寄生负载保持在至少单个芯片的电平来提高信号兼容性。

公开(公告)号：US20070132198A1

公开(公告)日：2007-06-14

申请号：US11606466

申请日：2006-11-29

Applicant: Dong-Ho Lee

Inventor： Dong-Ho Lee

IPC: B60G3/26 ,  B62D17/00

CPC classification number: B62D17/00 ,  B60G7/006 ,  B60G2200/10 ,  B60G2200/464 ,  B60G2202/413 ,  B60G2204/148 ,  B60G2204/416 ,  B60G2204/4232 ,  B60G2204/62 ,  B60G2600/182 ,  B60G2800/24

Abstract: Disclosed is a caster control apparatus for a suspension of a vehicle. When the vehicle travels on a road which causes a vehicle body to lean to one side, the caster of a lowered wheel is increased, and the caster of a raised wheel is decreased, such that the casters of the wheels on both sides are offset with each other. Therefore, the vehicle is inhibited from leaning due to the lateral slope of the road, and the straight-line stability of the vehicle can be reliably maintained.

Abstract translation: 公开了一种用于车辆悬架的脚轮控制装置。 当车辆在导致车体倾斜到一侧的道路上行驶时，下轮的脚轮增加，并且升轮的脚轮减小，使得两侧的车轮的脚轮偏移 彼此。 因此，由于道路的横向倾斜，车辆被阻止倾斜，能够可靠地保持车辆的直线稳定性。

公开(公告)号：US20070108573A1

公开(公告)日：2007-05-17

申请号：US11448772

申请日：2006-06-08

Applicant: Hyun-Soo Chung ,  In-Young Lee ,  Dong-Hyeon Jang ,  Myeong-Soon Park ,  Dong-Ho Lee

Inventor： Hyun-Soo Chung ,  In-Young Lee ,  Dong-Hyeon Jang ,  Myeong-Soon Park ,  Dong-Ho Lee

IPC: H01L23/02

CPC classification number: H01L23/3114 ,  H01L23/525 ,  H01L24/02 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/0401 ,  H01L2224/10126 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/16 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/3025

Abstract: A wafer level package may include a semiconductor substrate supporting an electrode pad. A first insulating layer may be provided on the semiconductor substrate. The first insulating layer may include a first opening through which the electrode pad may be exposed. A seed metal layer may be provided on an entire surface of the first insulating layer. A redistribution interconnection metal layer may be provided on the seed metal layer. A second insulating layer may be provided on the redistribution interconnection metal layer. The second insulating layer may have a second opening spaced from the first opening to expose a portion of the redistribution interconnection metal layer. The second insulating layer may surround the redistribution interconnection metal layer. An unwanted portion of seed metal layer may be removed using the second insulating layer as an etch mask.

Abstract translation: 晶片级封装可以包括支撑电极焊盘的半导体衬底。 第一绝缘层可以设置在半导体衬底上。 第一绝缘层可以包括第一开口，电极焊盘可以暴露在第一开口中。 种子金属层可以设置在第一绝缘层的整个表面上。 再分布互连金属层可以设置在种子金属层上。 第二绝缘层可以设置在再分布互连金属层上。 第二绝缘层可以具有与第一开口间隔开的第二开口，以暴露再分布互连金属层的一部分。 第二绝缘层可以包围再分布互连金属层。 可以使用第二绝缘层作为蚀刻掩模去除种子金属层的不需要的部分。

公开(公告)号：US07193666B2

公开(公告)日：2007-03-20

申请号：US10980656

申请日：2004-11-03

Applicant: Jung-Min Choi ,  Dong-Ho Lee

Inventor： Jung-Min Choi ,  Dong-Ho Lee

IPC: G02F1/1347

CPC classification number: G02B6/0063 ,  G02B5/3083 ,  G02B6/0043 ,  G02B6/0061 ,  G02F1/133605 ,  G02F1/133615 ,  G02F2001/133342 ,  G02F2001/133507

Abstract: Disclosed is an LCD device for performing bi-directional display. The LCD device includes first and second display units, and a light supplying unit. The first display unit includes an LCD panel and a transflective film that is disposed under the LCD panel and has layers in which first and second layers having different refractivity indexes are alternately stacked. The transflective film partially reflects and transmits light incident onto the film. The light supplying unit is disposed between the first and second display units, and provide the first and second display units with light generated from a lamp by dividing the light, to thereby regulate a contrast ratio of a luminance between the first and second display units. Therefore, the structure of an LCD panel for performing bi-directional image display can be simplified, and the light loss in the transmission mode can be reduced.

Abstract translation: 公开了一种用于执行双向显示的LCD装置。 LCD装置包括第一和第二显示单元和一个供光单元。 第一显示单元包括LCD面板和半透反射膜，该半透反射膜设置在LCD面板的下面，并且具有层，其中具有不同折射率指数的第一和第二层交替堆叠。 透反射膜部分地反射和透射入射到膜上的光。 光供给单元设置在第一显示单元和第二显示单元之间，并且通过分割光来为第一和第二显示单元提供由灯产生的光，从而调节第一和第二显示单元之间的亮度的对比度。 因此，可以简化用于执行双向图像显示的LCD面板的结构，并且可以减少传输模式中的光损失。