公开(公告)号：US20160329352A1

公开(公告)日：2016-11-10

申请号：US14892067

申请日：2015-04-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhijun LV ,  Ke WANG ,  Jiushi WANG ,  Fangzhen ZHANG

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  H01L21/77 ,  H01L27/12 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1262 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An array substrate and a fabrication method thereof, and a display device are provided. The array substrate comprises: a thin film transistor (TFT 10) provided on a base substrate (01), a first passivation layer (200) provided on the thin film transistor (TFT 10), and a transparent electrode layer (300) provided on a surface of the first passivation layer (200). The first passivation layer (300) includes: a first sub-thin film layer (210), and a second sub-thin film layer (211) which is provided on a surface of the first sub-thin film layer (210) and in contact with the transparent electrode layer (300); and a film density of the second sub-thin film layer (211) is greater than that of the first sub-thin film layer (210).

Abstract translation: 提供阵列基板及其制造方法以及显示装置。 阵列基板包括：设置在基底基板（01）上的薄膜晶体管（TFT 10），设置在薄膜晶体管（TFT 10）上的第一钝化层）和设置在薄膜晶体管上的透明电极层 第一钝化层（200）的表面。 第一钝化层（300）包括：第一亚薄膜层（210）和设置在第一亚薄膜层（210）的表面上的第二亚薄膜层（211） 与透明电极层（300）接触; 并且第二亚薄膜层（211）的膜密度大于第一亚薄膜层（210）的膜密度。

公开(公告)号：US20250098064A1

公开(公告)日：2025-03-20

申请号：US18552754

申请日：2022-10-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Nianqi YAO ,  Kun ZHAO ,  Ce NING ,  Zhengliang LI ,  Zhanfeng CAO ,  Ke WANG ,  Jiaxiang ZHANG ,  Qi QI ,  Hehe HU ,  Feifei LI ,  Jie HUANG ,  Jiayu HE

IPC: H05K1/02 ,  G02F1/1335 ,  G02F1/13357 ,  H05K1/11 ,  H05K3/28

Abstract: A circuit board includes a substrate, a first conductive layer, a first insulating layer and a second conductive layer. The first conductive layer includes a plurality of first conductive portions. The second conductive layer includes a plurality of second conductive portions. A second conductive portion passes through a first via hole in the first insulating layer to be in electrical contact with a first conductive portion. The first conductive layer and the second conductive layer each include at least one main conductive layer, which is capable of creating a first intermetallic compound with solder. At least one of the first conductive layer and the second conductive layer further includes a stop layer capable of creating a second intermetallic compound with the solder. A rate of a reaction between the stop layer and the solder is lower than a rate of a reaction between the main conductive layer and the solder.

公开(公告)号：US20240222336A1

公开(公告)日：2024-07-04

申请号：US17921326

申请日：2021-11-29

Applicant: BOE Technology Group Co., Ltd.

Inventor： Haixu LI ,  Zhanfeng CAO ,  Ke WANG ,  Yan QU

IPC: H01L25/075 ,  H01L33/00 ,  H01L33/20

CPC classification number: H01L25/0753 ,  H01L33/0095 ,  H01L33/20

Abstract: A light emitting baseplate and a method of manufacturing the same, and a display device. The light emitting baseplate includes a substrate, and a plurality of light emitting units and a plurality of supporting columns located on the substrate. The plurality of supporting columns are located on surfaces of the light emitting units away from the substrate. A surface of each of the light emitting units away from the substrate is provided with the supporting columns respectively. Heights of the supporting columns are equal. The supporting columns disposed on a surface of a same light emitting unit are symmetrically distributed about a symmetrical axis of the surface. The display device includes the light emitting baseplate.

公开(公告)号：US20240153871A1

公开(公告)日：2024-05-09

申请号：US17773106

申请日：2021-04-23

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhanfeng CAO ,  Jin YANG ,  Yingwei LIU ,  Ke WANG ,  Haixu LI

IPC: H01L23/522 ,  H01F41/04

CPC classification number: H01L23/5227 ,  H01F41/04 ,  H01L23/5222 ,  H01L23/5226

Abstract: A substrate integrated with passive devices and a manufacturing method thereof are provided. The manufacturing method of the substrate integrated with passive devices includes: integrating the passive devices on a transparent dielectric layer; forming the passive devices includes at least forming an inductor, wherein the inductor includes first sub-structures on a first surface thereof and second sub-structures on a second surface thereof, and first connection electrodes in first connection vias, respectively, to sequentially connect the first sub-structures and the second sub-structures together; forming the inductor includes: forming a first metal film layer on the first surface and/or the second surface, and forming the first connection electrodes in the first connection vias through an electroplating process, to fill the first connection vias; and forming a pattern including the first sub-structures on the first surface and a pattern including the second sub-structures on the second surface, through patterning processes, respectively.

公开(公告)号：US20240047507A1

公开(公告)日：2024-02-08

申请号：US17641135

申请日：2021-04-23

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Yingwei LIU ,  Zhanfeng CAO ,  Ke WANG

IPC: H01L23/66 ,  H01L23/522

CPC classification number: H01L28/10 ,  H01L23/5227 ,  H01L23/66 ,  H01L28/60 ,  H01L2223/6672

Abstract: The present disclosure provides a substrate integrated with a passive device and a method for manufacturing the same. The method includes: providing and processing a transparent dielectric layer to obtain the transparent dielectric layer provided with a first connection via therein, with the transparent dielectric layer including a first surface and a second surface which are disposed oppositely; and integrating a passive device, which includes at least an inductor, on the transparent dielectric layer. The integrating a passive device on the transparent dielectric layer includes: forming a first sub-structure on the first surface of the transparent dielectric layer, forming a second sub-structure on the second surface of the transparent dielectric layer, and forming a first connection electrode in the first connection via; and the first sub-structure, the first connection electrode and the second sub-structure are connected to form a coil structure of the inductor.

公开(公告)号：US20230131247A1

公开(公告)日：2023-04-27

申请号：US17043937

申请日：2019-10-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhiwei LIANG ,  Wenqian LUO ,  Zhijun LV ,  Yingwei LIU ,  Ke WANG ,  Zhanfeng CAO

IPC: H01L33/62 ,  H01L23/00

Abstract: The present disclosure provides a supporting substrate, including: a base substrate and a plurality of connecting electrodes provided on the base substrate, wherein a clamping electrode is provided on a side of at least one of the connecting electrodes facing away the base substrate, the clamping electrode is electrically connected with a corresponding connecting electrode and configured to be capable of clamping and fixing an electrode pin of the micro-light emitting device. The present disclosure also provides a manufacturing method for the supporting substrate, and a backplane.

公开(公告)号：US20220384492A1

公开(公告)日：2022-12-01

申请号：US17765355

申请日：2021-03-05

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xinhong LU ,  Zhanfeng CAO ,  Ke WANG ,  Jiushi WANG ,  Xiaoyan ZHU

IPC: H01L27/12 ,  H01L25/16

Abstract: An array substrate having a light-emitting unit region, a bonding region, and a bending region located between the light-emitting unit region and the bonding region. The light-emitting unit region is configured to be provided with light-emitting units. The bonding region is configured to bond a control circuit. The array substrate includes a base substrate located in the light-emitting unit region and the bonding region, a first organic material layer, a metal intermediate layer, and a second organic material layer. The first organic material layer is disposed on a side of the base substrate. The metal intermediate layer is disposed on a side of the first to organic material layer away from the base substrate. The second organic material layer is disposed on a side of the metal intermediate layer away from the base substrate.

公开(公告)号：US20220376137A1

公开(公告)日：2022-11-24

申请号：US17435016

申请日：2020-11-06

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Mingxing WANG ,  Binbin TONG ,  Lizhen ZHANG ,  Chenyang ZHANG ,  Zhen ZHANG ,  Xiawei YUN ,  Guangcai YUAN ,  Xue DONG ,  Muxin DI ,  Zhiwei LIANG ,  Ke WANG ,  Zhanfeng CAO

IPC: H01L33/38 ,  H01L33/46 ,  H01L33/62 ,  H01L33/00 ,  H01L25/075

Abstract: A light-emitting diode (LED) chip includes a plurality of epitaxial structures, at least one first electrode, and a plurality of second electrodes. Any two adjacent epitaxial structures of the plurality of epitaxial structures have a gap therebetween. Each epitaxial structure includes a first semiconductor pattern, a light-emitting pattern and a second semiconductor pattern stacked in sequence. First semiconductor patterns in at least two of the plurality of epitaxial structures are connected to each other to form a first semiconductor layer. A first electrode is electrically connected to the first semiconductor layer. Each second electrode is electrically connected to the second semiconductor pattern in at least one of the plurality of epitaxial structures.

公开(公告)号：US20220344554A1

公开(公告)日：2022-10-27

申请号：US16957766

申请日：2019-08-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ke WANG ,  Zhanfeng CAO

IPC: H01L33/62 ,  H01L25/075

Abstract: The present disclosure relates to a backplane, a backlight source, a display device, and a manufacturing method of the backplane. The backplane includes: a substrate; a plurality of barriers disposed on a surface of the substrate; and a first metal layer disposed on the surface of the substrate and including a plurality of metal patterns spaced apart by the plurality of barriers, wherein the barrier and the metal pattern are connected by a concave-convex mating structure.

公开(公告)号：US20220310660A1

公开(公告)日：2022-09-29

申请号：US17418945

申请日：2020-09-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhanfeng CAO ,  Ke WANG ,  Zhiwei LIANG ,  Jianguo WANG ,  Guocai ZHANG ,  Xinhong LU ,  Qi QI

IPC: H01L27/12 ,  G02F1/13357

Abstract: The present disclosure provides an array substrate and a manufacturing method thereof, a display panel and a backlight module. The manufacturing method of the array substrate includes: providing a base substrate; forming a metal wiring layer on a side of the base substrate, the metal wiring layer including a first copper metal layer; forming a planarization layer on a side of the metal wiring layer away from the base substrate; forming a drive lead layer on a side of the planarization layer away from the base substrate, the drive lead layer being electrically connected to the metal wiring layer, the drive lead layer including a second copper metal layer with a thickness larger than that of the first copper metal layer; forming a functional device layer on a side of the drive lead layer away from the base substrate.