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125 条记录 (耗时 0.04 秒)

    GATE DRIVING CIRCUIT AND DISPLAY APPARATUS HAVING THE SAME
    42.
    发明申请
    GATE DRIVING CIRCUIT AND DISPLAY APPARATUS HAVING THE SAME 有权
    闸门驱动电路和显示装置

    公开(公告)号：US20070296681A1

    公开(公告)日：2007-12-27

    申请号：US11760174

    申请日：2007-06-08

    申请人： Sung-Man KIM ,  Hong-Woo LEE ,  Byeong Jae AHN ,  Young-Geol SONG ,  Bong-Jun LEE ,  Yeon-Kyu MOON ,  Kyung-Wook KIM ,  Jin-Suk SEO

    发明人： Sung-Man KIM ,  Hong-Woo LEE ,  Byeong Jae AHN ,  Young-Geol SONG ,  Bong-Jun LEE ,  Yeon-Kyu MOON ,  Kyung-Wook KIM ,  Jin-Suk SEO

    IPC分类号： G09G3/36

    CPC分类号： G11C19/184 ,  G09G3/3674 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2320/041

    摘要： A gate driving circuit and a display apparatus having the gate driving circuit include a pull-up part and a carry part pull up a present gate signal and a present carry signal, respectively, to a first clock during a first period within one frame. A pull-down part receives a next gate signal to discharge the present gate signal to a source power voltage. A pull-up driving part is connected to control terminals of the carry part and pull-up part (Q-node) to turn the carry part and pull-up part on and off. A floating preventing part prevents an output terminal of the carry part from being floated in response to the first clock during a second period within the one frame.

    摘要翻译： 具有栅极驱动电路的栅极驱动电路和显示装置包括上拉部分和进位部分，分别在一帧内的第一时段期间将当前栅极信号和当前进位信号上拉到第一时钟。 下拉部分接收下一个栅极信号，以将当前栅极信号放电到源极电压。 上拉驱动部分连接到进位部分和上拉部分（Q-节点）的控制端子，以使进位部分和上拉部分打开和关闭。 浮动防止部件在一帧内的第二时段期间，响应于第一时钟防止进位部分的输出端子浮起。

    Method and apparatus for acquiring code group in asynchronous wideband code division multiple access system using receiver diversity
    43.
    发明申请
    Method and apparatus for acquiring code group in asynchronous wideband code division multiple access system using receiver diversity 有权
    使用接收机分集的异步宽带码分多址系统中获取码组的方法和装置

    公开(公告)号：US20060140155A1

    公开(公告)日：2006-06-29

    申请号：US11321239

    申请日：2005-12-29

    申请人： Woo-Jin Jang ,  Hong-Woo Lee

    发明人： Woo-Jin Jang ,  Hong-Woo Lee

    IPC分类号： H04B7/216

    CPC分类号： H04B1/70735

    摘要： Disclosed herein are a method and apparatus for acquiring a code group in an asynchronous Wideband Code Division Multiple Access (WCDMA) system. A primary synchronization channel search unit achieves primary synchronization channel slot timing synchronization. Then, the 1-1 search unit and 1-2 search unit of a secondary synchronization channel receive secondary synchronization channels from first and second antennas, respectively, start correlation operations between some of the slots of the received channels and code group candidates, and transmit information about candidates having values exceeding a predetermined threshold value to a determination unit. The determination unit transmits the received information about candidates to a second search unit of the secondary synchronization channel. The second search unit of the secondary synchronization channel calculates correlation characteristics based on the received information about candidates and selects a code group candidate having a highest correlation characteristic.

    摘要翻译： 本文公开了一种用于在异步宽带码分多址（WCDMA）系统中获取码组的方法和装置。 主同步信道搜索单元实现主同步信道时隙定时同步。 然后，次同步信道的1-1搜索单元和1-2搜索单元分别从第一和第二天线接收辅同步信道，开始接收信道的一些时隙和码组候选之间的相关操作，并发送 关于具有超过预定阈值的值的候选的信息给确定单元。 确定单元将接收到的关于候选的信息发送到辅同步信道的第二搜索单元。 次同步信道的第二搜索单元基于所接收的关于候选的信息计算相关特性，并选择具有最高相关特性的码组候选。

    Display substrate, method of manufacturing the same and liquid crystal display device having the same
    44.
    发明申请
    Display substrate, method of manufacturing the same and liquid crystal display device having the same 有权
    显示基板及其制造方法以及具有该基板的液晶显示装置

    公开(公告)号：US20060061711A1

    公开(公告)日：2006-03-23

    申请号：US11210280

    申请日：2005-08-23

    申请人： Back-Won Lee ,  Jeong-Il Kim ,  Hong-Woo Lee

    发明人： Back-Won Lee ,  Jeong-Il Kim ,  Hong-Woo Lee

    IPC分类号： G02F1/1335

    CPC分类号： G02F1/133514 ,  G02F1/13454 ,  G02F1/136227 ,  G02F2001/136222

    摘要： A display substrate comprises a base substrate divided into a display region and a peripheral region surrounding the display region, wherein an image is displayed in the display region, a pixel part formed in the display region of the base substrate, a first color filter layer formed on the base substrate including the pixel part, wherein the first color filter layer is formed in the display region, and a second color filter layer formed in the peripheral region of the base substrate.

    摘要翻译： 显示基板包括分为显示区域和围绕显示区域的周边区域的基底基板，其中在显示区域中显示图像，形成在基底基板的显示区域中的像素部分，形成的第一滤色器层 在包括像素部分的基底基板上，其中第一滤色器层形成在显示区域中，以及形成在基底基板的周边区域中的第二滤色器层。

    Apparatus for growing a silicon ingot
    45.
    发明授权
    Apparatus for growing a silicon ingot 有权

    公开(公告)号：US06574264B2

    公开(公告)日：2003-06-03

    申请号：US10029949

    申请日：2001-12-31

    申请人： Hong-Woo Lee ,  Joon-Young Choi ,  Hyon-Jong Cho

    发明人： Hong-Woo Lee ,  Joon-Young Choi ,  Hyon-Jong Cho

    IPC分类号： H05B300

    CPC分类号： C30B15/14 ,  C30B15/10 ,  C30B15/30

    摘要： An apparatus for growing a silicon ingot including a graphite crucible in which a quartz crucible is placed, a driving axis connected to a lower part of the graphite crucible to revolve and move the graphite crucible up and down so as to support the graphite crucible, a heating element to heat the graphite crucible, and an insulating wall to protect and thermally isolate the graphite crucible, heating means, and driving axis in part from the external environment. The driving axis includes a hollow axis part having a hollow inside, an insulating axis part attached to the bottom of the hollow axis part to inhibit heat transfer, and a cylindrical axis part attached to the bottom of the insulating axis part. The construction of the driving axis reduces a temperature gradient in the molten silicon, improving uniform heat distribution for increased silicon ingot quality.

    Array substrate and display panel having the same
    47.
    发明授权
    Array substrate and display panel having the same 有权
    阵列基板和显示面板相同

    公开(公告)号：US08508450B2

    公开(公告)日：2013-08-13

    申请号：US12043308

    申请日：2008-03-06

    申请人： Beom-Jun Kim ,  Hee-Joon Kim ,  Hong-Woo Lee ,  Hye-Rhee Han ,  Hyeong-Jun Park ,  Jin-Suk Seo

    发明人： Beom-Jun Kim ,  Hee-Joon Kim ,  Hong-Woo Lee ,  Hye-Rhee Han ,  Hyeong-Jun Park ,  Jin-Suk Seo

    IPC分类号： G09G3/38 ,  G02F1/136 ,  G02F1/1343

    CPC分类号： H01L27/124 ,  G02F1/134309 ,  G02F1/136286

    摘要： An array substrate of an LCD having: a gate line formed along a first direction; a data line formed along a second direction crossing the first direction; first and second pixel electrodes spaced apart from each other; a thin-film transistor includes a gate electrode connected to the gate line; a source electrode connected to the data line and partially overlapping the second pixel electrode; and a drain electrode connected to the first pixel electrode spaced apart from the second pixel electrode along the second direction. The source electrode or the gate electrode overlaps the second pixel electrode but the drain electrode does not overlap the second pixel electrode. Electrical coupling between the first and second pixel electrodes are avoided with such configuration.

    摘要翻译： 一种LCD的阵列基板，具有沿第一方向形成的栅极线; 沿着与第一方向交叉的第二方向形成的数据线; 第一和第二像素电极彼此间隔开; 薄膜晶体管包括连接到栅极线的栅极; 源极连接到数据线并部分地与第二像素电极重叠; 以及漏极，其沿着所述第二方向连接到与所述第二像素电极间隔开的所述第一像素电极。 源电极或栅电极与第二像素电极重叠，但漏电极不与第二像素电极重叠。 通过这种配置可以避免第一和第二像素电极之间的电耦合。

    METHOD OF DRIVING A GATE LINE AND GATE DRIVE CIRCUIT FOR PERFORMING THE METHOD
    49.
    发明申请
    METHOD OF DRIVING A GATE LINE AND GATE DRIVE CIRCUIT FOR PERFORMING THE METHOD 有权
    驱动门线和门驱动电路的方法，用于执行方法

    公开(公告)号：US20130002309A1

    公开(公告)日：2013-01-03

    申请号：US13612532

    申请日：2012-09-12

    申请人： HONG-WOO LEE ,  Sung-Man Kim ,  Jong-Hyuk Lee ,  Jong-Hwan Lee ,  Hyeon-Hwan Kim ,  Sang-Moon Moh ,  Jeong-Il Kim ,  Yeon-Kyu Moon

    发明人： HONG-WOO LEE ,  Sung-Man Kim ,  Jong-Hyuk Lee ,  Jong-Hwan Lee ,  Hyeon-Hwan Kim ,  Sang-Moon Moh ,  Jeong-Il Kim ,  Yeon-Kyu Moon

    IPC分类号： H03K3/00

    CPC分类号： G11C19/28 ,  G09G3/3677 ,  G09G2300/0408

    摘要： A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.

    摘要翻译： 上拉驱动部分通过响应于前一级或垂直启动信号之一接收导通电压而将第一节点的信号保持在高电平。 上拉部分响应于第一节点的信号通过输出端子输出时钟信号。 当第一节点的信号分别为低或高时，第一保持部件将第二节点的信号保持在高电平或低电平。 第二保持部分响应于第二节点的信号或延迟和反相的时钟信号，将第一节点的信号和输出端的信号保持在接地电压。

    Ripple preventing gate driving circuit and display apparatus having the same
    50.
    发明授权
    Ripple preventing gate driving circuit and display apparatus having the same 失效
    波纹防止栅极驱动电路及其显示装置

    公开(公告)号：US08264443B2

    公开(公告)日：2012-09-11

    申请号：US12241880

    申请日：2008-09-30

    申请人： Hong-Woo Lee ,  Hyeon-Hwan Kim ,  Byeong-Jae Ahn ,  Sun-Hyung Kim ,  Sung-Man Kim ,  Bong-Jun Lee

    发明人： Hong-Woo Lee ,  Hyeon-Hwan Kim ,  Byeong-Jae Ahn ,  Sun-Hyung Kim ,  Sung-Man Kim ,  Bong-Jun Lee

    IPC分类号： G09G3/36

    CPC分类号： G09G3/3677

    摘要： A gate driving circuit includes stages, the stages being cascaded and each including: a pull-up part which pulls up a gate voltage to a clock signal during a horizontal scanning period (1H); a carry part which pulls up a carry voltage to the clock signal during the horizontal scanning period (1H); a pull-up driving part connected to a control terminal (Q-node) common to the carry part and the pull-up part and which receives a previous carry voltage from a first previous stage to turn on the pull-up part and the carry part; and a ripple preventing part which prevents a ripple generated at a previous Q-node of a second previous stage based on a ripple generated at the Q-node of the carry part and the pull-up part.

    摘要翻译： 门驱动电路包括级级，级联级，每级包括：在水平扫描周期（1H）期间将门电压上拉至时钟信号的上拉部分; 在水平扫描期间（1H）中将进位电压拉入时钟信号的进位部分; 上拉驱动部分连接到与进位部分和上拉部分共同的控制端子（Q-节点），并且从上一级接收先前的进位电压以接通上拉部分和进位 部分; 以及纹波防止部，其基于在所述进位部和所述上拉部的所述Q节点处产生的波纹来防止在前一级的前一Q点产生的纹波。