摘要:
A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.
摘要:
Disclosed is a display device. The display device includes first and second substrates facing each other, a sealant pattern including a first compound attaching the first and the second substrates together, and a separator pattern within the sealant pattern. The separator pattern includes a second compound chemically reacting with the first compound to block the diffusion of the first compound.
摘要:
A panel assembly for a display device and a display device having the panel assembly are provided. The panel assembly for a display device includes a display region including a plurality of pixels and most of display signal lines connected to the pixels, a plurality of repair lines disposed in a shape of a ring in a peripheral region outside of the display region, and first to third auxiliary repair lines disposed in the peripheral region in parallel to data lines. An additional auxiliary repair line is provided at a right side of each of the data driving IC regions. By doing so, occurrence of disconnection and success in repairing the disconnected data lines of a display penal which is mounted in a COG scheme is tested by using a TCP type of test unit, so that it is possible to greatly reduce production costs involved in the COG type test unit.
摘要:
A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.
摘要:
A panel assembly for a display device and a display device having the panel assembly are provided. The panel assembly for a display device includes a display region including a plurality of pixels and most of display signal lines connected to the pixels, a plurality of repair lines disposed in a shape of a ring in a peripheral region outside of the display region, and first to third auxiliary repair lines disposed in the peripheral region in parallel to data lines. An additional auxiliary repair line is provided at a right side of each of the data driving IC regions. By doing so, occurrence of disconnection and success in repairing the disconnected data lines of a display penal which is mounted in a COG scheme is tested by using a TCP type of test unit, so that it is possible to greatly reduce production costs involved in the COG type test unit.
摘要:
A liquid crystal display (“LCD”) includes a data interconnection line including a data line, a source electrode as a branch of the data line, and a drain electrode formed spaced apart from the source electrode, a semiconductor layer formed under the data interconnection line and connected to the source electrode and the drain electrode below the source electrode and the drain electrode and forming a channel region, and a gate interconnection line formed under the semiconductor layer and including a gate line intersecting the data line, the gate line extending in a first direction and the data line extending in a second direction, and a gate electrode branched from the gate line, wherein the gate line includes a first recess having a first width and a first length.
摘要:
A liquid crystal display (“LCD”) includes a data interconnection line including a data line, a source electrode as a branch of the data line, and a drain electrode formed spaced apart from the source electrode, a semiconductor layer formed under the data interconnection line and connected to the source electrode and the drain electrode below the source electrode and the drain electrode and forming a channel region, and a gate interconnection line formed under the semiconductor layer and including a gate line intersecting the data line, the gate line extending in a first direction and the data line extending in a second direction, and a gate electrode branched from the gate line, wherein the gate line includes a first recess having a first width and a first length.
摘要:
A gate driving circuit is provided which includes a plurality of stages cascade-connected with each other and outputting a plurality of gate signals. An n-th (n is a natural number) stage includes a gate output part, a first node control part and a carry part. The gate output part includes a first transistor. The first transistor outputs a high voltage of a clock signal to a high voltage of an n-th gate signal in response to a high voltage of a control node. The first node control part is connected to the control node to control a signal of the control node and includes at least one transistor having a channel longer than the channel length of the first transistor. The carry part outputs the high voltage of the clock signal to an n-th carry signal in response to the signal of the control node.
摘要:
A display apparatus includes a gate driver which sequentially outputs a gate signal at a high state in response to a gate control signal and a data driver which converts image data into a data signal in response to a data control signal. The display apparatus further includes a display panel which includes a plurality of gate lines which sequentially receive the gate signal, a plurality of data lines which receive the data signal and a plurality of pixels connected to the gate and data lines and which receive the data signal in response to the gate signal to display an image. The polarity of the data signal is inverted after the gate signal transitions to a low state.