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公开(公告)号：US10942680B2
公开(公告)日：2021-03-09
申请号：US16503593
申请日：2019-07-04
Applicant: PHISON ELECTRONICS CORP.
Inventor： Ping-Chuan Lin , Yi-Hsuan Lin , Bing-Hong Wu
Abstract: A data writing method, a memory storage device, and a memory control circuit unit are provided. The method includes: receiving a first data and writing the first data to at least one first physical programming unit of a first physical erasing unit; receiving a second data; temporarily storing the second data to a temporary storage area if a data length of the second data is less than a predefined value; receiving a third data; writing the third data to at least one second physical programming unit of the first physical erasing unit if a logical address storing the first data is consecutive with a logical address storing the third data; and moving the second data from the temporary storage area to at least one second physical programming unit of the first physical erasing unit if the logical address storing the first data is not consecutive with the logical address storing the third data.
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公开(公告)号：US10923212B2
公开(公告)日：2021-02-16
申请号：US16251105
申请日：2019-01-18
Applicant: PHISON ELECTRONICS CORP.
Inventor： Wei Lin , An-Cheng Liu , Yu-Cheng Hsu , Yu-Siang Yang
Abstract: A memory control method for a rewritable non-volatile memory module including a plurality of physical units is provided according to an exemplary embodiment of the disclosure. The method includes: reading first data from a first physical unit of a rewritable non-volatile memory module; decoding the first data by a decoding circuit; updating reliability information according to the decoded first data; reading second data from a second physical unit of the rewritable non-volatile memory module; and decoding the second data by the decoding circuit according to the updated reliability information.
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公开(公告)号：US10922021B2
公开(公告)日：2021-02-16
申请号：US16395259
申请日：2019-04-26
Applicant: PHISON ELECTRONICS CORP.
Inventor： Yi-Chang Hsieh , Che-Wei Chang
Abstract: The disclosure provides a data storage method, a memory storage apparatus, and a memory control circuit unit. The method includes: allocating logical addresses to be mapped to physical programming units of physical erasing units; grouping the logical addresses into logical address groups; receiving write commands and data to be stored into the logical addresses; writing the data into the physical programming units; recording a data write timestamp of each of the physical erasing units; recording a bit sum of each of the logical address groups; and identifying the data belonging to the first logical address group as cold data if the bit sum of a first logical address group is less than a bit sum threshold value and the data write timestamp of the physical erasing units writing data belonging to the first logical address group is less than a timestamp threshold value.
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公开(公告)号：US10922019B2
公开(公告)日：2021-02-16
申请号：US16380973
申请日：2019-04-10
Applicant: PHISON ELECTRONICS CORP.
Inventor： Chia-Hung Chien , Hsiao-Hsuan Yen
Abstract: A data writing method, a memory controlling circuit unit and a memory storage device are provided. The method includes: receiving a plurality of data from a host system, and writing the data into a plurality of first physical programming units; performing a multi-frame encoding according to the plurality of data to generate encoded data, and writing the encoded data into a second physical programming unit; and writing a plurality of first concatenated information related to the encoded data into the plurality of first programming units, respectively.
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公开(公告)号：US20200379676A1
公开(公告)日：2020-12-03
申请号：US16452540
申请日：2019-06-26
Applicant: PHISON ELECTRONICS CORP.
Inventor： Wei Lin , Yu-Cheng Hsu
IPC: G06F3/06
Abstract: A data writing method, a memory controlling circuit unit and a memory storage device are provided. The method includes: receiving a plurality of data; writing the plurality of data into a first physical erasing unit by using a multi-page programming mode; and writing at least one first data of the plurality of data into a second physical erasing unit by using a single-page programming mode; verifying the plurality of data stored in the first physical erasing unit; and if the verification fails, performing a writing operation to a third physical erasing unit by using the multi-page programming mode according to the at least one first data and the plurality of data.
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Patent Agency Ranking
公开(公告)号：US20200379654A1
公开(公告)日：2020-12-03
申请号：US16529807
申请日：2019-08-02
Applicant: PHISON ELECTRONICS CORP.
Inventor： Wei Lin , Yu-Cheng Hsu , Hsiao-Yi Lin , Yu-Siang Yang
Abstract: A memory control method, a memory storage device and a memory control circuit unit are provided. The method includes: reading a first physical unit among a plurality of physical units based on a first electrical configuration to obtain first soft information; reading the first physical unit based on a second electrical configuration which is different from the first electrical configuration to obtain second soft information; classifying a plurality of memory cells in the first physical unit according to the first soft information and the second soft information; and decoding data read from the first physical unit according to a classification result of the memory cells.
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公开(公告)号：US20200326736A1
公开(公告)日：2020-10-15
申请号：US16427289
申请日：2019-05-30
Applicant: PHISON ELECTRONICS CORP.
Inventor： Jia-Huei Yeh , Chao-Ta Huang , Yi-Feng Li , Po-Chieh Chiu , Chun-Yu Ling
Abstract: A temperature control circuit for an electronic device is provided. The temperature control circuit includes a temperature detector, a status detection circuit and a control circuit. The temperature detector is configured to detect a temperature of the electronic device and generate first evaluation information. The status detection circuit is configured to detect a work status of at least one circuit module in the electronic device and generate second evaluation information. The control circuit is configured to adjust at least one electronic parameter of the electronic device according to the first evaluation parameter and the second evaluation parameter to control the temperature of the electronic device.
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公开(公告)号：US10782920B2
公开(公告)日：2020-09-22
申请号：US16186584
申请日：2018-11-12
Applicant: PHISON ELECTRONICS CORP.
Inventor： Chih-Kang Yeh
IPC: G06F3/06
Abstract: A data access method, a memory storage apparatus and a memory control circuit unit are provided. The memory storage apparatus includes a rewritable non-volatile memory module and the memory control circuit unit for controlling the rewritable non-volatile memory module. The data access method includes: receiving an access command; detecting a temperature of the memory storage apparatus; determining whether the temperature of the memory storage apparatus is lower than a first threshold; if the temperature of the memory storage apparatus is lower than the first threshold, performing a dummy access command or adjusting an operating voltage. The data access method further includes performing the access command after the dummy access command is performed or the operating voltage is adjusted.
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公开(公告)号：US20200210093A1
公开(公告)日：2020-07-02
申请号：US16278172
申请日：2019-02-18
Applicant: PHISON ELECTRONICS CORP.
Inventor： Ping-Chuan Lin , Shii-Yeu Chern , Tai-Yuan Huang , Yi-Hsuan Lin , Chi-Shun Kao
IPC: G06F3/06
Abstract: A memory management method, a memory storage device and a memory control circuit unit are provided. The method includes: storing first data to a first physical erasing unit and marking the first physical erasing unit as belonging to a first group, wherein the first data belongs to a first type; storing second data to a second physical erasing unit and marking the second physical erasing unit as belonging to a second group, wherein the second data belongs to a second type which is different from the first type; selecting a third physical erasing unit as an active physical erasing unit and marking the third physical erasing unit as belonging to the first group; when a data moving operation is performed, moving valid data of the first physical erasing unit to the third physical erasing unit according to a first parameter of the first physical erasing unit.
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公开(公告)号：US10678698B2
公开(公告)日：2020-06-09
申请号：US15706757
申请日：2017-09-17
Applicant: PHISON ELECTRONICS CORP.
Inventor： Chih-Kang Yeh
IPC: G06F12/02 , G06F12/08 , G06F3/06 , G06F12/0884
Abstract: A data writing method, a memory control circuit unit, and a memory storage device are provided. The data writing method includes transmitting a command to a host system to obtain a plurality of data, wherein the plurality of data are arranged in a sequence order in the host system, obtaining first data among the plurality of data and obtaining second data after obtaining the first data. The method further includes writing the first data to a corresponding physical page on a first word line among a plurality of word lines, and writing the second data to another corresponding physical page on a second word line among the plurality of word lines, wherein the first and second word lines belong to first and second memory sub-modules, and the first data and the second data are discontinuously arranged in the sequence order. The first and second data may each comprise sub-data, and the sub-data may be written into physical pages on the first and second word lines.
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