Integrated Optical Modulator
    32.
    发明申请

    公开(公告)号:US20170219854A1

    公开(公告)日:2017-08-03

    申请号:US15420429

    申请日:2017-01-31

    CPC classification number: G02F1/035 G02F1/0316 G02F2202/20

    Abstract: An optical modulator is provided. The optical modulator can include a wave guide layer made of an electro-optical material with two or more electrodes directly contacting the wave guide layer. Each electrode can include an associated optical wave guide region, which is located within the wave guide layer. Each optical wave guide region is aligned with a lateral location corresponding to an electric field peak, which can be generated during operation of the optical modulator in a circuit, associated with the corresponding electrode. One or more voltage sources in a circuit can be operated to generate an electric field peak at one or more of the electrodes.

    Semiconductor Device with Breakdown Preventing Layer
    35.
    发明申请
    Semiconductor Device with Breakdown Preventing Layer 有权
    具有故障防护层的半导体器件

    公开(公告)号:US20160111505A1

    公开(公告)日:2016-04-21

    申请号:US14979915

    申请日:2015-12-28

    Abstract: A semiconductor device with a breakdown preventing layer is provided. The breakdown preventing layer can be located in a high-voltage surface region of the device. The breakdown preventing layer can include an insulating film or a low conductive film with conducting elements embedded therein. The conducting elements can be arranged along a lateral length of the insulating film or the low conductive film. The conducting elements can vary in at least one of composition, doping, conductivity, size, thickness, shape, and distance from the device channel along a lateral length of the insulating film or the low conductive film, or in a direction that is perpendicular to the lateral length.

    Abstract translation: 提供具有防分解层的半导体器件。 防破坏层可以位于器件的高压表面区域中。 防破坏层可以包括绝缘膜或具有嵌入其中的导电元件的低导电膜。 导电元件可以沿着绝缘膜或低导电膜的横向长度布置。 导电元件可以沿着绝缘膜或低导电膜的横向长度,或者在垂直于绝缘膜的方向上的组成,掺杂,导电性,尺寸,厚度,形状和与器件沟道的距离中的至少一种, 横向长度。

    Lateral/Vertical Semiconductor Device with Embedded Isolator
    37.
    发明申请
    Lateral/Vertical Semiconductor Device with Embedded Isolator 有权
    具有嵌入式隔离器的侧向/垂直半导体器件

    公开(公告)号:US20150021664A1

    公开(公告)日:2015-01-22

    申请号:US14333890

    申请日:2014-07-17

    Abstract: A lateral/vertical device is provided. The device includes a device structure including a device channel having a lateral portion and a vertical portion. The lateral portion of the device channel can be located adjacent to a first surface of the device structure, and one or more contacts and/or a gate can be formed on the first surface. The device structure also includes a set of insulating layers located in the device structure between the lateral portion of the device channel and a second surface of the device structure opposite the first surface. An opening in the set of insulating layers defines a transition region between the lateral portion of the device channel and a vertical portion of the device channel. A contact to the vertical portion of the device channel can be located on the second surface.

    Abstract translation: 提供横向/垂直装置。 该装置包括装置结构,其包括具有侧部和垂直部分的装置通道。 器件通道的横向部分可以位于器件结构的第一表面附近,并且可以在第一表面上形成一个或多个触点和/或栅极。 器件结构还包括一组位于器件结构的器件结构中的绝缘层,该绝缘层位于器件沟道的侧面部分和与第一表面相对的器件结构的第二表面之间。 该组绝缘层中的开口限定了器件沟道的横向部分与器件沟道的垂直部分之间的过渡区域。 与设备通道的垂直部分的接触可以位于第二表面上。

    Semiconductor Device with Breakdown Preventing Layer
    39.
    发明申请
    Semiconductor Device with Breakdown Preventing Layer 有权
    具有故障防护层的半导体器件

    公开(公告)号:US20140091373A1

    公开(公告)日:2014-04-03

    申请号:US14040900

    申请日:2013-09-30

    Abstract: A semiconductor device with a breakdown preventing layer is provided. The breakdown preventing layer can be located in a high-voltage surface region of the device. The breakdown preventing layer can include an insulating film with conducting elements embedded therein. The conducting elements can be arranged along a lateral length of the insulating film. The conducting elements can be configured to split a high electric field spike otherwise present in the high-voltage surface region during operation of the device into multiple much smaller spikes.

    Abstract translation: 提供具有防分解层的半导体器件。 防破坏层可以位于器件的高压表面区域中。 防破坏层可以包括其中嵌入有导电元件的绝缘膜。 导电元件可以沿着绝缘膜的横向长度布置。 导电元件可以被配置为在设备操作期间将高电场尖峰分裂成另外存在于高电压表面区域中的多个更小的尖峰。

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