Abstract:
An electronic device includes a first housing having a first through-hole, of which a first opening and a second opening are communicated with each other, and a second housing connected to the first housing to be rotatable. A flexible printed circuit board (FPCB) extends from the first housing to the second housing via the first through-hole. The FPCB includes a plurality of layers, a first sealing member disposed in the first through-hole and surrounding the FPCB, and a lamination part toward the first sealing member. A portion of a first layer and/or a second layer corresponding to the second lamination part includes at least one first valley extending from a surface that faces an adjacent layer in a lengthwise direction of the FPCB. The lamination part includes a first adhesive layer interposed between the first layer and the second layer and filling the at least one first valley.
Abstract:
A semiconductor device may include a device isolation layer on a side of the active region, a gate trench intersecting the active region, a gate structure in the gate trench, a bit line electrically connected to a first region of the active region, and a pad pattern electrically connected to a second region of the active region. An upper surface of the second region may be higher than an upper surface of the first region and lower than an upper surface of the bit line. A width of the bit line may be greater in an upper region than a lower region thereof. The pad pattern may contact upper and side surfaces of the second region. An upper surface of the pad pattern may be higher than an upper surface of the bit line. The gate trench may be between the first and second regions of the active region.
Abstract:
A semiconductor device includes first and second active patterns extending in a first direction and being adjacent to each other in a second direction, the first and second active patterns, each of which includes first and second edges spaced apart from each other in the first direction, a first storage node pad and a first storage node contact sequentially provided on the first edge of the first active pattern, a second storage node pad and a second storage node contact sequentially provided on the second edge of the second active pattern, and a fence pattern between the first and the second storage node contacts. Bottom and top surfaces of the first storage node contact are located at first and second levels, respectively. In a third direction, a width of the fence pattern at the first level is less than a width of the fence pattern at the second level.
Abstract:
A semiconductor device includes an active pattern on a substrate. A bit line structure is on the active pattern. A spacer structure is on a sidewall of the bit line structure. A lower contact plug directly contacts the spacer structure. The spacer structure includes a first spacer covering an upper sidewall of the lower contact plug and a second spacer covering a lower sidewall of the lower contact plug and a portion of a lower surface of the lower contact plug. The lower contact plug includes an extension portion covered by the first and second spacers and a protrusion portion protruding from the first and second spacers. A bottom surface of the protrusion portion is disposed at a level that is lower than or equal to a level of a bottom surface of the second spacer.
Abstract:
Provided is a semiconductor device including a conductive contact plug on a substrate, the conductive contact plug including a lower portion and an upper portion on the lower portion, the lower portion having a first width, and the upper portion having a second width less than the first width, a bit line structure on the conductive contact plug, the bit line structure including a conductive structure and an insulation structure provided in a vertical direction perpendicular to an upper surface of the substrate, and a first lower spacer, a second lower spacer, and a third lower spacer sequentially provided on a sidewall of the lower portion of the conductive contact plug in a horizontal direction parallel to the upper surface of the substrate, wherein an uppermost surface of the third lower spacer is higher than an upper surface of the first lower spacer and an upper surface of the second lower spacer.
Abstract:
A method of operating a homomorphic encryption operation accelerator includes performing a number theoretic transform (NTT) operation on each of first homomorphic ciphertext and second homomorphic ciphertext, and performing a base conversion operation by adding a partial sum using a first value of the NTT operation.
Abstract:
An electronic device is provided. The electronic device includes a housing, a circuit board disposed in the housing and receiving a communication module, an antenna assembly disposed in the housing and including an antenna pattern electrically connected with the communication module and a ground pattern, and a conductive plate disposed on the antenna assembly. At least a portion of the ground pattern may be positioned between the antenna pattern and the conductive plate. The conductive plate may be configured to be electrically coupled with the antenna pattern through the ground pattern.
Abstract:
An electronic device is disclosed. The electronic device discloses a plurality of wireless charging antennas, a plurality of shielding partition layers, at least some of the plurality of shielding partition layers disposed between the plurality of wireless charging antennas, a plurality of external device-receiving grooves formed through spaces defined between pairs of the shielding partition layers, and a processor electrically coupled to the plurality of wireless charging antennas. The processor is configured to: determine whether at least one external device is inserted into at least one of the plurality of external device-receiving grooves, and when the at least one external device is inserted into the at least one of the plurality of external device-receiving grooves, wirelessly transmit power through at least one wireless charging antenna corresponding to the at least one of the plurality of external device-receiving grooves into which the at least one external device is inserted.
Abstract:
According to an embodiment, an electronic device comprises a metal housing forming at least part of an outer surface of the electronic device, at least part of the metal housing used as an antenna configured to communicate a signal for first communication, a radio frequency (RF) transceiver electrically connected with the antenna, an RF receiver configured to process a signal for second communication, at least one processor, and a memory, wherein the at least one processor is configured to detect insertion of a connection part of an external antenna for the second communication into a connector electrically connected with the RF receiver and output a control signal for adjusting a resonance frequency of the antenna based on the detection of insertion.
Abstract:
An electronic device and method of wireless power transfer therefor are provided. The electronic device may include a frequency change circuit to produce a first signal of a frequency corresponding to at least one wireless power transfer scheme, a duty cycle change circuit to produce a second signal of a duty cycle corresponding to the at least one wireless power transfer scheme, and a control unit to control at least one of the frequency change circuit and the duty cycle change circuit according to the at least one wireless power transfer scheme. Various other embodiments are also possible.