公开(公告)号：US20060216813A1

公开(公告)日：2006-09-28

申请号：US10539817

申请日：2003-12-15

申请人： Walter Gumbrecht ,  Konrad Mund ,  Meinrad Schienle ,  Roland Thewes

发明人： Walter Gumbrecht ,  Konrad Mund ,  Meinrad Schienle ,  Roland Thewes

IPC分类号： C12M1/34

CPC分类号： G01N33/5438 ,  C12Q1/6825

摘要： A DNA chip includes a carrier and a microarray of spots containing immobilised catcher molecules which are arranged on the carrier. Each spot contains a microelectrode system for the impedance spectroscopic detection of binding events occurring between the catcher molecules and target molecules of an analyte solution applied to the spots. The microelectrode system has a pair of polarisation electrodes in order to produce an alternating electromagnetic field and a pair of sensor electrodes for measuring a voltage drop in the analyte.

摘要翻译： DNA芯片包括布置在载体上的载体和含有固定捕获剂分子的斑点的微阵列。 每个斑点包含用于阻抗光谱检测在施加到斑点的分析物溶液的捕获剂分子和靶分子之间发生的结合事件的微电极系统。 微电极系统具有一对极化电极以产生交变电磁场和一对传感器电极，用于测量分析物中的电压降。

公开(公告)号：US07012468B2

公开(公告)日：2006-03-14

申请号：US10195196

申请日：2002-07-15

申请人： Ralf Brederlow ,  Roland Thewes

发明人： Ralf Brederlow ,  Roland Thewes

IPC分类号： H03F3/16

CPC分类号： H03F1/26 ,  H01L2924/0002 ,  H01L2924/00

摘要： The circuit configuration and the associated method allow reducing the 1/f noise of MOSFETs in an electronic circuit, especially in an integrated circuit with one or more MOSFETs. At least one direct current and/or at least one direct voltage source for adjusting constant working point(s) of the MOSFET(s) is/are assigned to one or more or all MOSFETs. At least one periodically oscillating current and/or voltage source is assigned to one or more or all MOSFETs so that the respective working points periodically oscillate about the constant working point(s) in such a manner that impurity states in the oxide of the MOSFET, which are recharged under the condition of a constant working point according to the principles of statistics such that they determine the 1/f noise signal, are no longer recharged statistically but at a lower probability due to the modulatory frequency of the periodically oscillating sources.

公开(公告)号：US06873173B2

公开(公告)日：2005-03-29

申请号：US10220449

申请日：2001-03-05

申请人： Ute Kollmer ,  Ulrich Schaper ,  Carsten Linnenbank ,  Roland Thewes

发明人： Ute Kollmer ,  Ulrich Schaper ,  Carsten Linnenbank ,  Roland Thewes

IPC分类号： G01R31/26 ,  G01R31/27 ,  G01R31/30 ,  G11C29/50

CPC分类号： G11C29/028 ,  G01R31/2621 ,  G01R31/275 ,  G01R31/3004 ,  G11C29/50 ,  G11C2029/5004

摘要： The invention relates to a test circuit configuration. Every gate terminal of a transistor to be tested is coupled to a gate voltage source in such a manner that the gate voltage can be measured and adjusted individually on every gate terminal. The source terminal of every transistor to be tested can be coupled to the source voltage source in such a manner that the source voltage can be measured and adjusted individually on every source terminal.

摘要翻译： 本发明涉及一种测试电路结构。 要测试的晶体管的每个栅极端子以这样的方式耦合到栅极电压源，使得可以在每个栅极端子上单独地测量和调整栅极电压。 要测试的每个晶体管的源极端子可以以这样的方式耦合到源极电压源，使得可以在每个源极端子上单独测量和调节源极电压。

公开(公告)号：US06831474B2

公开(公告)日：2004-12-14

申请号：US10203179

申请日：2002-12-30

申请人： Ute Kollmer ,  Carsten Linnenbank ,  Ulrich Schaper ,  Roland Thewes

发明人： Ute Kollmer ,  Carsten Linnenbank ,  Ulrich Schaper ,  Roland Thewes

IPC分类号： G01R3128

CPC分类号： G01R31/275 ,  G01R31/2851

摘要： An apparatus and method for testing a plurality of electrical components that are coupled to one another. Further, an electrical selection unit, coupled to the electrical components to be tested, is provided for selecting at least one electrical component to be tested. A parasitic voltage drop in the testing circuit can be at least partially compensated using a control element coupled to the electrical components to be tested. The invention makes it possible, for testing of electrical components on a wafer over a large distance, i.e., several millimeters, to permit automated compensation of interference influences which occur as a result of the lines coupling or connecting the components to be tested.

摘要翻译： 一种用于测试彼此耦合的多个电气部件的装置和方法。 此外，提供耦合到要测试的电气部件的电选择单元，用于选择至少一个要测试的电气部件。 可以使用耦合到要测试的电气部件的控制元件来至少部分地补偿测试电路中的寄生电压降。 本发明使得可以在大范围（即几毫米）上测试晶片上的电气部件，以允许自动补偿由于线路耦合或连接待测组件的结果而发生的干扰影响。

公开(公告)号：US06611614B1

公开(公告)日：2003-08-26

申请号：US09597350

申请日：2000-06-19

申请人： Stefan Jung ,  Roland Thewes ,  Werner Weber

发明人： Stefan Jung ,  Roland Thewes ,  Werner Weber

IPC分类号： G06K900

CPC分类号： G06K9/00067 ,  G06K9/00973 ,  G06K9/56 ,  G06T5/20

摘要： Sensor elements are arranged in a hexagonal grid. A processor element in the form of a primitive automaton is assigned to each of the sensor elements in the grid. The processor elements are set up to perform algorithms which enable lines of a fingerprint to be simplified such that characteristic minutiae of the fingerprint (endings and branchings of the lines) can be extracted. The processor elements are embodied using CMOS/Neuron MOS threshold value logic or using CMOS/NMOS pass transistor logic. The image grid can be read out via read-out circuits as a matrix.

摘要翻译： 传感器元件布置在六边形网格中。 原始自动机形式的处理器元件被分配给网格中的每个传感器元件。 处理器元件被设置为执行能够简化指纹行的算法，使得可以提取指纹的特征细节（结尾和分支）。 处理器元件使用CMOS /神经元MOS阈值逻辑或使用CMOS / NMOS传输晶体管逻辑来实现。 图像网格可以通过读出电路作为矩阵读出。

公开(公告)号：US06490192B2

公开(公告)日：2002-12-03

申请号：US09968575

申请日：2001-10-01

申请人： Roland Thewes ,  Werner Weber

发明人： Roland Thewes ,  Werner Weber

IPC分类号： G11C1100

CPC分类号： G11C11/15

摘要： A magnetoresistive memory is described and contains a common word line voltage source, bit lines, word lines crossing the bit lines, and a memory cell array having memory cells with cell resistors. The memory cell array further has reference cells with reference cell resistors. The memory cell array is configured such that for testing a respective cell resistor in each case two of the reference cell resistors nearest the respective cell resistor and the reference cell are simultaneously connected to a common word line voltage. A first feedback amplifier together with the two reference cell resistors form a summing amplifier. A second feedback amplifier together with the respective cell resistor form an amplifier having an equivalent gain as the summing amplifier. A comparator is connected to the summing amplifier and the amplifier. The comparator has an output supplying an evaluation signal dependent on the respective cell resistor.

公开(公告)号：US5825701A

公开(公告)日：1998-10-20

申请号：US682022

申请日：1996-07-16

申请人： Paul-Werner Von Basse ,  Roland Thewes ,  Doris Schmitt-Landsiedel ,  Michael Bollu

发明人： Paul-Werner Von Basse ,  Roland Thewes ,  Doris Schmitt-Landsiedel ,  Michael Bollu

IPC分类号： G11C11/412 ,  G11C7/12 ,  G11C17/12 ,  G11C7/00

CPC分类号： G11C7/12 ,  G11C17/126

摘要： The memory cell arrangement has MOS transistors (10) connected between bitlines (4, 4.sub.1) and connected row-by-row by means of selection lines (5). For pre-charging of all the bitlines (4, 4.sub.1) without a blocking of an access to these lines, further MOS transistors (20), connected between the bitlines (4, 4.sub.1) and a supply line (7), are provided, whose gate terminals (20.sub.2) are connected to a common pre-charging line (6).

摘要翻译： 存储单元布置具有连接在位线（4,41）之间并通过选择线（5）逐行连接的MOS晶体管（10）。 为了对所有位线（4,41）进行预充电而不阻塞访问这些线路，连接在位线（4,41）和电源线（7）之间的另外的MOS晶体管（20）被提供， 其栅极端子（202）连接到公共预充电线（6）。

公开(公告)号：US5818112A

公开(公告)日：1998-10-06

申请号：US549201

申请日：1995-10-27

申请人： Werner Weber ,  Stefan Kuehn ,  Michael Kleiner ,  Roland Thewes

发明人： Werner Weber ,  Stefan Kuehn ,  Michael Kleiner ,  Roland Thewes

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L23/48 ,  H01L23/538 ,  H01L25/065 ,  H03K3/356 ,  H03K3/3565 ,  H01L29/00 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L25/0657 ,  H01L23/48 ,  H01L23/481 ,  H03K3/356017 ,  H03K3/356113 ,  H03K3/3565 ,  H01L2225/06527 ,  H01L2924/0002

摘要： In an arrangement for signal transmission between chip layers of a vertically integrated circuit, a defined, capacitive signal transmission ensues between a part of the vertically integrated circuit in one chip layer and a further part of the vertically integrated circuit in a further chip layer by means of a coupling capacitance. Particularly given high connection densities, a large number of freely placeable and reliable vertical signal connections can be produced directly from the inside of one chip layer to the inside of a neighboring chip layer without extremely high demands being made on the adjustment of the chip layers relative to one another and on the surface planarity of the individual chip layers.

摘要翻译： 在用于垂直集成电路的芯片层之间的信号传输的布置中，在一个芯片层中的垂直集成电路的一部分与垂直集成电路的另一部分之间，通过装置 的耦合电容。 特别是给定的高连接密度，可以从一个芯片层的内部到相邻的芯片层的内部直接产生大量可自由放置和可靠的垂直信号连接，而对芯片层相对的调整没有非常高的要求 并且在各个芯片层的表面平面度上。

公开(公告)号：US5701037A

公开(公告)日：1997-12-23

申请号：US549068

申请日：1995-10-27

申请人： Werner Weber ,  Stefan Kuehn ,  Michael Kleiner ,  Roland Thewes

发明人： Werner Weber ,  Stefan Kuehn ,  Michael Kleiner ,  Roland Thewes

IPC分类号： H01L21/822 ,  H01L23/48 ,  H01L23/538 ,  H01L25/065 ,  H01L27/00 ,  H01L27/04 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/48 ,  H01L25/0657 ,  H01L2225/06513 ,  H01L2225/06531 ,  H01L2924/0002

摘要： In an arrangement for signal transmission between chip layers of a vertically integrated circuit, a defined, inductive signal transmission ensues between a part of the vertically integrated circuit in one chip layer and a further part of the vertically integrated circuit in a further chip layer by means of a coupling inductance formed by respective coils in the two layers. Particularly given high connection densities, a large number of freely placeable and reliable vertical signal connections can be produced directly from the inside of one chip layer to the inside of a neighboring chip layer without extremely high demands being made on the adjustment of the chip layers relative to one another and on the surface planarity of the individual chip layers.

摘要翻译： 在用于垂直集成电路的芯片层之间的信号传输的布置中，在一个芯片层中的垂直集成电路的一部分和垂直集成电路的另一部分之间，通过装置进一步确定了感应信号传输 由两层中的各个线圈形成的耦合电感。 特别是给定的高连接密度，可以从一个芯片层的内部到相邻的芯片层的内部直接产生大量可自由放置和可靠的垂直信号连接，而对芯片层相对的调整没有非常高的要求 并且在各个芯片层的表面平面度上。

公开(公告)号：US07817037B2

公开(公告)日：2010-10-19

申请号：US10562458

申请日：2004-06-30

申请人： Ralf Brederlow ,  Sylvain Briole ,  Christian Pacha ,  Roland Thewes ,  Werner Weber

发明人： Ralf Brederlow ,  Sylvain Briole ,  Christian Pacha ,  Roland Thewes ,  Werner Weber

IPC分类号： G08B13/14 ,  H03K7/08

CPC分类号： G06K19/0723

摘要： The invention relates to an electronic component that can be operated by means of an alternating voltage. Said component includes at least one input, at least one output and a pair of electronic sub-components with an identical function. The input(s) of the electronic component is/are coupled to a respective input of the electronic sub-components with an identical function and the output(s) of the electronic component is/are coupled to a respective output of said electronic sub-components. In addition, the electronic component is configured in such a way that at least one output only one output signal of the first sub-component of the pair of functionally identical electronic components can be picked up during a first half-wave of an alternating voltage, whereas only one output signal of the second sub-component of the pair of functionally identical electronic can be picked up during the second half-wave of the alternating voltage.

摘要翻译： 本发明涉及可以通过交流电压操作的电子部件。 所述组件包括具有相同功能的至少一个输入，至少一个输出和一对电子子部件。 电子部件的输入端以相同的功能耦合到电子子部件的相应输入端，并且电子部件的输出耦合到所述电子部件的相应输出端， 组件。 此外，电子部件被配置为使得在交流电压的第一半波期间可以拾取一对功能相同的电子部件中的第一子部件的至少一个输出信号的一个输出信号， 而一对功能相同的电子对的第二子分量的一个输出信号可以在交流电压的第二个半波期间被拾取。