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公开(公告)号：US5483085A
公开(公告)日：1996-01-09
申请号：US239626
申请日：1994-05-09
CPC分类号： H01L27/156 , Y10S257/921
摘要： An electro-optic integrated circuit including an addressable array of light emitting devices, a column decoder and a plurality of address lines formed on the substrate. There are address lines each including an external connection pad. The decoder includes a switching circuit connected to each column for activating the column and a plurality of sets of diodes connected to the address lines and the switching circuits so that each set of diodes has a unique code produced by a combination of diodes in that set .and the address lines to which the diodes in that set are connected.
摘要翻译： 一种电光集成电路，包括可寻址的发光器件阵列，列解码器和形成在衬底上的多个地址线。 每个地址线都包括一个外部连接板。 解码器包括连接到每列用于激活列的开关电路和连接到地址线和开关电路的多组二极管，使得每组二极管具有由该组中的二极管的组合产生的唯一代码。 以及该组中的二极管连接到的地址线。
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公开(公告)号：US5164949A
公开(公告)日：1992-11-17
申请号：US756695
申请日：1991-09-09
申请人： Donald E. Ackley , Paige M. Holm
发明人： Donald E. Ackley , Paige M. Holm
CPC分类号： H01S5/18341 , H01S5/0424 , H01S5/18308 , H01S5/18369
摘要： A planar semiconductor laser having low thermal and series resistance is fabricated. The semiconductor laser has an optical waveguide and a lateral current injection path provided by a conductive region. The conductive region disorders the active region and the first 1/4 wave stack of the laser, which reduces the reflectivity, therefore allowing control of the optical waveguide independent of the current flow. By forming the conductive region, the laser of the present invention can have stable optical characteristics and a bigger emission spot due to the weak built-in waveguide, thus resulting in the formation of a device having high output and a low thermal and series resistance.
摘要翻译： 制造具有低热阻和串联电阻的平面半导体激光器。 半导体激光器具有由导电区域提供的光波导和横向电流注入路径。 导电区域会扰乱激光器的有源区和第一1/4波长叠层，从而降低了反射率，从而允许独立于电流的光波导的控制。 通过形成导电区域，本发明的激光器由于内置波导较弱，可以具有稳定的光学特性和更大的发光点，从而形成具有高输出和低热阻和串联电阻的器件。
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公开(公告)号：US09040355B2
公开(公告)日：2015-05-26
申请号：US13546902
申请日：2012-07-11
CPC分类号： B81B7/0006 , B81B7/0077 , B81B2201/02 , B81C1/0023 , H01L2224/48091 , H01L2224/48464 , H01L2924/1461 , H01L2924/00014 , H01L2924/00
摘要： A method (70) of forming sensor packages (20) entails providing a sensor wafer (74) having sensors (30) formed on a side (26) positioned within areas (34) delineated by bonding perimeters (36), and providing a controller wafer (82) having control circuitry (42) at one side (38) and bonding perimeters (46) on an opposing side (40). The bonding perimeters (46) of the controller wafer (82) are bonded to corresponding bonding perimeters (36) of the sensor wafer (74) to form a stacked wafer structure (48) in which the control circuitry (42) faces outwardly. The controller wafer (82) is sawn to reveal bond pads (32) on the sensor wafer (74) which are wire bonded to corresponding bond pads (44) formed on the same side (38) of the wafer (82) as the control circuitry (42). The structure (48) is encapsulated in packaging material (62) and is singulated to produce the sensor packages (20).
摘要翻译： 形成传感器封装（20）的方法（70）需要提供传感器晶片（74），传感器晶片（74）具有形成在位于通过接合周边（36）所描绘的区域（34）内的侧面（26）上的传感器（30），并且提供控制器 具有在一侧（38）处的控制电路（42）和在相对侧（40）上的接合周边（46）的晶片（82）。 控制器晶片（82）的接合周边（46）被接合到传感器晶片（74）的对应的接合周边（36），以形成其中控制电路（42）面向外的堆叠的晶片结构（48）。 锯切控制器晶片（82）以露出传感器晶片（74）上的接合焊盘（32），该接合焊盘引线键合到形成在晶片（82）的同一侧（38）上的对应接合焊盘（44） 电路（42）。 结构（48）被封装在包装材料（62）中，并被分割以产生传感器封装（20）。
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公开(公告)号：US20140124958A1
公开(公告)日：2014-05-08
申请号：US14151305
申请日：2014-01-09
IPC分类号： H01L23/528
CPC分类号： H01L23/528 , B81C1/0023 , B81C1/00238 , B81C2201/019 , B81C2203/0792 , H01L2224/48091 , H01L2924/1461 , H01L2924/00014 , H01L2924/00
摘要： A method (80) entails providing (82) a structure (117), providing (100) a controller element (102, 24), and bonding (116) the controller element to an outer surface (52, 64) of the structure. The structure includes a sensor wafer (92) and a cap wafer (94) Inner surfaces (34, 36) of the wafers (92, 94) are coupled together, with sensors (30) interposed between the wafers. One wafer (94, 92) includes a substrate portion (40, 76) with bond pads (42) formed on its inner surface (34, 36). The other wafer (94, 92) conceals the substrate portion (40, 76). After bonding, methodology (80) entails forming (120) conductive elements (60) on the element (102, 24), removing (126) material sections (96, 98, 107) from the wafers to expose the bond pads, forming (130) electrical interconnects (56), applying (134) packaging material (64), and singulating (138) to produce sensor packages (20, 70).
摘要翻译： 方法（80）需要提供（82）结构（117），提供（100）控制器元件（102,24），并将控制器元件（116）结合（116）到结构的外表面（52,64）。 该结构包括传感器晶片（92）和盖晶片（94）晶片（92,94）的内表面（34,36）被耦合在一起，传感器（30）插入晶片之间。 一个晶片（94,92）包括具有形成在其内表面（34,36）上的接合焊盘（42）的衬底部分（40,76）。 另一个晶片（94,92）隐藏基板部分（40,76）。 在结合之后，方法学（80）需要在元件（102,24）上形成（120）导电元件（60），从晶片去除（126）材料部分（96,98,107）以暴露接合焊盘，形成 130）电互连（56），施加（134）包装材料（64）和单分离（138）以产生传感器封装（20,70）。
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公开(公告)号：US20140061948A1
公开(公告)日：2014-03-06
申请号：US13597824
申请日：2012-08-29
CPC分类号： H01L23/528 , B81C1/0023 , B81C1/00238 , B81C2201/019 , B81C2203/0792 , H01L2224/48091 , H01L2924/1461 , H01L2924/00014 , H01L2924/00
摘要： A method (80) entails providing (82) a structure (117), providing (100) a controller element (102, 24), and bonding (116) the controller element to an outer surface (52, 64) of the structure (117). The structure includes a sensor wafer (92) and a cap wafer (94). Inner surfaces (34, 36) of the wafers (92, 94) are coupled together, with sensors (30) interposed between the wafers (92, 94). One wafer (94, 92) includes a substrate portion (40, 76) with bond pads (42) formed on its inner surface (34, 36). The other wafer (94, 92) conceals the substrate portion (40, 76). After bonding, methodology (80) entails forming (120) conductive elements (60) on the element (102, 24), removing (126) material sections (96, 98, 107) from the wafers (92, 94, 102) to expose the bond pads (42), forming (130) electrical interconnects (56), applying (134) packaging material (64), and singulating (138) to produce sensor packages (20, 70).
摘要翻译： 方法（80）需要提供（82）结构（117），提供（100）控制器元件（102,24），并且将所述控制器元件（116）结合（116）到所述结构的外表面（52,64） 117）。 该结构包括传感器晶片（92）和盖晶片（94）。 晶片（92,94）的内表面（34,36）被耦合在一起，传感器（30）置于晶片（92,94）之间。 一个晶片（94,92）包括具有形成在其内表面（34,36）上的接合焊盘（42）的衬底部分（40,76）。 另一个晶片（94,92）隐藏基板部分（40,76）。 在键合之后，方法（80）需要在元件（102,24）上形成（120）导电元件（60），将材料部分（96,98,107）从晶片（92,94,107）移除到 露出接合焊盘（42），形成（130）电互连（56），施加（134）包装材料（64）和单分离（138）以产生传感器封装（20,70）。
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36.发明授权公开(公告)号：US06596616B1
公开(公告)日：2003-07-22
申请号：US10126795
申请日：2002-04-19
申请人： Paige M. Holm , Olin L. Hartin , H. Philip Li
发明人： Paige M. Holm , Olin L. Hartin , H. Philip Li
IPC分类号： H01L2144
CPC分类号： H01L29/66848 , H01L21/28575 , H01L21/76802 , H01L29/41725 , H01L29/456 , H01L2924/0002 , H01L2924/00
摘要： A method and apparatus for decreasing contact resistance between a ohmic contact (120) and a semiconductor material (106) are disclosed. Increased contact resistance, which occurs as a result of encroachment of the ohmic contact (120) into the semiconductor material (106) is compensated for by notching edges of the ohmic contact (1210) to increase the effective surface area between abutting surfaces of the ohmic contact (120) and semiconductor material (106). The increase in surface area increases the effective transfer length of the contact, which correspondingly reduces contact resistance and improves device performance.
摘要翻译： 公开了一种降低欧姆接触（120）和半导体材料（106）之间的接触电阻的方法和装置。 由于欧姆接触（120）侵入半导体材料（106）而导致的增加的接触电阻通过欧姆接触（1210）的切口边缘来补偿，以增加欧姆接触（120）的邻接表面之间的有效表面积 触点（120）和半导体材料（106）。 表面积的增加增加了接触件的有效传递长度，从而相应地降低了接触电阻并提高了器件性能。
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37.发明授权
公开(公告)号：US5780321A
公开(公告)日：1998-07-14
申请号：US699263
申请日：1996-08-19
申请人： Chan-Long Shieh , Hsing-Chung Lee , Paige M. Holm
发明人： Chan-Long Shieh , Hsing-Chung Lee , Paige M. Holm
CPC分类号： H01L27/156 , H01L25/162 , H01L25/167 , H01L2924/0002
摘要： A light emitting diode display package and method of fabricating a light emitting diode (LED) display package including a light emitting diode array on a substrate, having row and column connection pads routed to display connection pads positioned on an uppermost surface of the LED array device, a separate silicon driver device having connection pads routed to an uppermost surface, positioned to cooperatively meet those of the LED device when properly registered, the LED device flip chip bump bonded to the driver device using standard C5 DCA, an underfill layer positioned between the space defined by the LED device and the driver device. The LED display and driver device package subsequently having selectively removed the substrate onto which the LED array was initially formed. The light emitted from the LED display device, being emitted through the remaining indium-gallium-aluminum-phosphide (InGaAlP) epilayer of the LED device.
摘要翻译： 一种发光二极管显示器封装以及制造在衬底上包括发光二极管阵列的发光二极管（LED）显示器封装的方法，所述发光二极管阵列具有布置成显示位于所述LED阵列器件的最上表面上的连接焊盘的行和列连接焊盘 ，具有连接到最上表面的连接焊盘的单独的硅驱动器装置，其被定位成在正确地注册时协同地与LED器件的那些耦合，使用标准C5 DCA将LED装置倒装芯片凸块结合到驱动器装置，底部填充层位于 LED设备和驱动器设备定义的空间。 LED显示器和驱动器件封装件随后选择性地去除了最初形成LED阵列的衬底。 从LED显示装置发射的光通过LED装置的剩余的铟 - 镓 - 铝 - 磷化物（InGaAlP）外延层发射。
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公开(公告)号：US5621225A
公开(公告)日：1997-04-15
申请号：US599434
申请日：1996-01-18
申请人： Chan-Long Shieh , Hsing-Chung Lee , Paige M. Holm
发明人： Chan-Long Shieh , Hsing-Chung Lee , Paige M. Holm
CPC分类号： H01L27/156 , H01L25/162 , H01L25/167 , H01L2924/0002
摘要： A light emitting diode display package and method of fabricating a light emitting diode (LED) display package including a light emitting diode array on a substrate, having row and column connection pads routed to display connection pads positioned on an uppermost surface of the LED array device, a separate silicon driver device having connection pads routed to an uppermost surface, positioned to cooperatively meet those of the LED device when properly registered, the LED device flip chip bump bonded to the driver device using standard C5 DCA, an underfill layer positioned between the space defined by the LED device and the driver device. The LED display and driver device package subsequently having selectively removed the substrate onto which the LED array was initially formed. The light emitted from the LED display device, being emitted through the remaining indium-gallium-aluminum-phosphide (InGaAlP) epilayer of the LED device.
摘要翻译： 一种发光二极管显示器封装以及制造在衬底上包括发光二极管阵列的发光二极管（LED）显示器封装的方法，所述发光二极管阵列具有布置成显示位于所述LED阵列器件的最上表面上的连接焊盘的行和列连接焊盘 ，具有连接到最上表面的连接焊盘的单独的硅驱动器器件，其被定位成在正确地注册时协同地与LED器件的LED器件匹配，使用标准C5 DCA将LED器件倒装芯片凸块结合到驱动器器件，底部填充层位于 LED设备和驱动器设备定义的空间。 LED显示器和驱动器件封装件随后选择性地去除了最初形成LED阵列的衬底。 从LED显示装置发射的光通过LED装置的剩余的铟 - 镓 - 铝 - 磷化物（InGaAlP）外延层发射。
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公开(公告)号：US5077589A
公开(公告)日：1991-12-31
申请号：US666436
申请日：1991-03-11
申请人： Paige M. Holm , Daniel L. Rode
发明人： Paige M. Holm , Daniel L. Rode
IPC分类号： H01L29/06 , H01L29/40 , H01L29/78 , H01L29/812
CPC分类号： H01L29/402 , H01L29/7813 , H01L29/8122
摘要： A semiconductor device structure comprises a semiconductor substrate having a semiconductor layer of the same conductivity type formed on its first surface. A drain contact is formed on the second surface of the substrate and conductive regions having the opposite conductivity type of the substrate are formed in the semiconductor layer and are separated by a predetermined distance. Channel regions having the same conductivity type as the substrate are disposed above the conductive regions and source regions are disposed therein. A shielding region is then formed on the surface of the device structure in the area between the conductive regions. The structure allows for reduced or eliminated gate-drain capacitance, reduced output conductance and increased breakdown voltage capability.
摘要翻译： 半导体器件结构包括在其第一表面上形成有具有相同导电类型的半导体层的半导体衬底。 在衬底的第二表面上形成漏极接触，并且在半导体层中形成具有相反导电类型的衬底的导电区，并且隔开预定距离。 具有与衬底相同的导电类型的沟道区域设置在导电区域上方，并且源区域设置在其中。 然后在导电区域之间的区域中的器件结构的表面上形成屏蔽区域。 该结构允许降低或消除栅 - 漏电容，降低输出电导和提高击穿电压能力。
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