公开(公告)号：US07656010B2

公开(公告)日：2010-02-02

申请号：US11898958

申请日：2007-09-18

Applicant: Tomohiro Murata ,  Hiroaki Ueno ,  Hidetoshi Ishida ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

Inventor： Tomohiro Murata ,  Hiroaki Ueno ,  Hidetoshi Ishida ,  Tetsuzo Ueda ,  Yasuhiro Uemoto ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC: H01L23/58

CPC classification number: H01L29/7787 ,  H01L23/367 ,  H01L23/3677 ,  H01L29/2003 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes: a semiconductor layer; at least one electrode formed on a semiconductor layer to be in contact with the semiconductor layer; and a passivation film covering the semiconductor layer and at least part of the top surface of the electrode to protect the semiconductor layer and formed of a plurality of sub-films. The passivation film includes a first sub-film made of aluminum nitride.

Abstract translation: 半导体器件包括：半导体层; 形成在与半导体层接触的半导体层上的至少一个电极; 以及覆盖半导体层和电极的顶表面的至少一部分的钝化膜，以保护半导体层并由多个子膜形成。 钝化膜包括由氮化铝制成的第一子膜。

公开(公告)号：US20080211567A1

公开(公告)日：2008-09-04

申请号：US12020163

申请日：2008-01-25

Applicant: Tatsuo MORITA ,  Manabu YANAGIHARA ,  Hidetoshi ISHIDA ,  Yasuhiro UEMOTO ,  Manabu INOUE

Inventor： Tatsuo MORITA ,  Manabu YANAGIHARA ,  Hidetoshi ISHIDA ,  Yasuhiro UEMOTO ,  Manabu INOUE

IPC: H03K17/687

CPC classification number: H03K17/687 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/7787 ,  H03K17/302 ,  H03K17/567 ,  H03K17/6877 ,  H03K17/74 ,  H03K17/78 ,  H03K17/795 ,  H03K2217/0036

Abstract: A bidirectional switch includes a field-effect transistor having a first ohmic electrode, a second ohmic electrode and a gate electrode, and a control circuit for controlling between a conduction state and a cut-off state by applying a bias voltage to the gate electrode. The control circuit applies the bias voltage from the first ohmic electrode as a reference when a potential of the second ohmic electrode is higher than the potential of the first ohmic electrode, and applies the bias voltage from the second ohmic electrode as a reference when the potential of the second electrode is lower than the potential of the first ohmic electrode.

Abstract translation: 双向开关包括具有第一欧姆电极，第二欧姆电极和栅电极的场效应晶体管，以及通过向栅电极施加偏压来控制导通状态和截止状态的控制电路。 当第二欧姆电极的电位高于第一欧姆电极的电位时，控制电路施加来自第一欧姆电极的偏置电压作为参考，并且当第二欧姆电极的电位为电位时施加来自第二欧姆电极的偏置电压作为参考 的第二电极的电位低于第一欧姆电极的电位。

公开(公告)号：US20070176204A1

公开(公告)日：2007-08-02

申请号：US11699426

申请日：2007-01-30

Applicant: Tomohiro Murata ,  Hidetoshi Ishida

Inventor： Tomohiro Murata ,  Hidetoshi Ishida

IPC: H01L29/15 ,  H01L31/00 ,  H01L29/739

CPC classification number: H01L29/7787 ,  H01L29/2003 ,  H01L29/7843

Abstract: A field effect transistor includes a first semiconductor layer made of a first group III-V nitride; a second semiconductor layer formed on the first semiconductor layer, made of a second group III-V nitride and having a gate recess portion for exposing the first semiconductor layer therein; and a gate electrode formed on the first semiconductor layer in the gate recess portion. A product of stress applied by the second semiconductor layer to the first semiconductor layer and the thickness of the second semiconductor layer is 0.1 N/cm or less.

Abstract translation: 场效应晶体管包括由第一III-V族氮化物构成的第一半导体层; 形成在第一半导体层上的第二半导体层，由第二组III-V族氮化物制成，并具有用于在其中暴露第一半导体层的栅极凹部; 以及形成在所述栅极凹部中的所述第一半导体层上的栅电极。 由第二半导体层施加到第一半导体层的应力的产物和第二半导体层的厚度为0.1N / cm以下。

公开(公告)号：US07064359B2

公开(公告)日：2006-06-20

申请号：US10912567

申请日：2004-08-06

Applicant: Hidetoshi Ishida ,  Tsuyoshi Tanaka ,  Daisuke Ueda

Inventor： Hidetoshi Ishida ,  Tsuyoshi Tanaka ,  Daisuke Ueda

IPC: H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109

CPC classification number: H01L29/42316 ,  H01L29/2003 ,  H01L29/7787 ,  Y10S257/918

Abstract: A switching semiconductor device includes a first compound layer formed on a single crystal substrate which includes silicon carbide or sapphire, and including a general formula InxGa1-xN, where 0≦x≦1; a second compound layer formed on the first compound layer, and including a general formula InyALzGa1-y-zN, where 0≦y≦1 and 0

Abstract translation: 开关半导体器件包括形成在包括碳化硅或蓝宝石的单晶衬底上的第一复合层，并且包括通式为N 1 Ga 1-x N，其中 0 <= x <= 1; 形成在第一化合物层上的第二化合物层，并且包含通式为Y 1，Y z，Ga 1-y z N，其中0 < = y <= 1，0

公开(公告)号：US06299361B1

公开(公告)日：2001-10-09

申请号：US09391387

申请日：1999-09-08

Applicant: Takashi Sasaki ,  Teruaki Nishida ,  Hidetoshi Ishida ,  Dai Yui ,  Kei Sunaga

Inventor： Takashi Sasaki ,  Teruaki Nishida ,  Hidetoshi Ishida ,  Dai Yui ,  Kei Sunaga

IPC: G02B638

CPC classification number: G02B6/3636 ,  G02B6/3652 ,  G02B6/368 ,  G02B6/3839

Abstract: The invention has an object to provide a method of making an optical fiber array in which bare fibers obtained by removing a coating of an optical fiber ribbon can be certainly arrayed on a V-groove substrate. A first feature of the invention is to use a positioning guide, and the positioning guide is provided with a recess portion having inclined wall surfaces, and its bottom portion is made to have a width equal to the whole width of the bare fibers in an arrayed state. By using this positioning guide, the optical fiber array can be made in a process as follows. In a state where bare fibers exposed by removing part of coating of tip portions of two fiber ribbons are alternately arranged, the positioning guide is raised from below. The bare fibers with irregular gaps are moved by the positioning guide and are arranged. In this state, the bare fibers are pressed by a fiber pressing member from above, and the V-groove substrate is raised, so that they are put on V grooves and are fixed by an adhesive.

Abstract translation: 本发明的目的是提供一种制造光纤阵列的方法，其中通过去除光纤带的涂层而获得的裸露纤维可以可靠地排列在V形槽衬底上。 本发明的第一个特征是使用定位引导件，并且定位引导件设置有具有倾斜壁面的凹部，并且其底部部分的宽度等于裸线纤维的整个宽度的排列 州。 通过使用该定位引导件，光纤阵列可以如下进行。 在通过移除两个光纤带的末端部分的涂层的一部分而露出的裸露纤维线交替布置的状态下，定位引导件从下方升高。 具有不规则间隙的裸露纤维通过定位引导件移动并被布置。 在这种状态下，裸纤维被纤维挤压件从上方挤压，V形槽衬底被升高，使它们放在V形槽上并用粘合剂固定。

公开(公告)号：US5339376A

公开(公告)日：1994-08-16

申请号：US942061

申请日：1992-09-09

Applicant: Toshiaki Kakii ,  Makoto Honjo ,  Hidetoshi Ishida ,  Hiroshi Katsura ,  Toru Yamanishi ,  Kazumichi Miyabe ,  Tadashi Haibara ,  Michito Matsumoto

Inventor： Toshiaki Kakii ,  Makoto Honjo ,  Hidetoshi Ishida ,  Hiroshi Katsura ,  Toru Yamanishi ,  Kazumichi Miyabe ,  Tadashi Haibara ,  Michito Matsumoto

IPC: G02B6/38 ,  G02B6/40

CPC classification number: G02B6/3865 ,  G02B6/3839 ,  G02B6/3873

Abstract: An optical connector for connecting optical fibers, comprises: a guide-groove substrate having grooves for positioning optical fibers and guide pins; an upper plate having groove portions each for covering the guide pins positioned in the guide grooves of the guide-groove substrate; elastic guide-pin pressing members each provided in the groove portions of the upper plate above portions where the guide pin grooves are in contact with the guide pins. In such a arrangement, it is preferable to form an oxide film on said V-grooves of the guide-groove substrate at least in the vicinity of contact points between the guide pins and the V-grooves. The optical connector further includes a resin molding portion for surrounding the substrate and the upper plate, the resin molding portion including a pair of opposite opened portions at a front and back surfaces thereof.

Abstract translation: 一种用于连接光纤的光连接器，包括：具有用于定位光纤和引导销的槽的导槽基板; 上板，其具有各自用于覆盖位于导向槽基板的引导槽中的引导销的槽部; 弹性导向销按压部件分别设置在所述上​​板的所述槽部中，所述槽部在所述导销槽与所述引导销接触的部分之上。 在这种布置中，优选至少在引导销和V形槽之间的接触点附近在导槽基板的所述V形槽上形成氧化膜。 光连接器还包括用于围绕基板和上板的树脂模制部分，树脂模制部分在其前表面和后表面上包括一对相对的开口部分。

公开(公告)号：US09116307B2

公开(公告)日：2015-08-25

申请号：US13824164

申请日：2011-10-03

Applicant: Hiroyoshi Maesoba ,  Tetsuji Tanaka ,  Hidetoshi Ishida

Inventor： Hiroyoshi Maesoba ,  Tetsuji Tanaka ,  Hidetoshi Ishida

IPC: G02B6/38

CPC classification number: G02B6/38 ,  G02B6/3869 ,  G02B6/387 ,  G02B6/3877 ,  G02B6/3878

Abstract: A sleeve for an optical connector into which a ferrule arranged to hold an optical fiber is to be inserted, and by which an optical connector in which the sleeve is to be housed can be reduced in size in a direction that the optical connector is fitted into a counterpart optical connector. A sleeve for an optical connector includes a portion having a tube shape, into which a ferrule is to be inserted, and a hook portion at one end of the sleeve, the hook portion protruding in a diameter direction of the tube-shaped portion.

Abstract translation: 用于插入光纤连接器的用于保持光纤的套圈的光学连接器的套筒，并且通过该套筒可以将光学连接器装入的方向减小其中容纳套筒的光学连接器的尺寸 对应的光连接器。 用于光连接器的套筒包括一个具有套管形状的管状部分，套筒一端的钩部分，钩形部分沿着管状部分的直径方向突出。

公开(公告)号：US08604338B2

公开(公告)日：2013-12-10

申请号：US13469794

申请日：2012-05-11

Applicant: Akio Matsushita ,  Akihiro Itoh ,  Tohru Nakagawa ,  Hidetoshi Ishida

Inventor： Akio Matsushita ,  Akihiro Itoh ,  Tohru Nakagawa ,  Hidetoshi Ishida

IPC: H01L31/00

CPC classification number: H01L31/0693 ,  H01L31/035281 ,  H01L31/0543 ,  H01L31/184 ,  Y02E10/544

Abstract: A method for generating electric power with use of a solar cell includes steps of: (a) preparing the solar cell including a condensing lens and a solar cell element, wherein the following inequation set (I) is satisfied: d2

Abstract translation: 一种使用太阳能电池产生电力的方法包括以下步骤：（a）制备包括聚光透镜和太阳能电池元件的太阳能电池，其中满足以下不等式组（I）：d2

公开(公告)号：US20130183002A1

公开(公告)日：2013-07-18

申请号：US13824164

申请日：2011-10-03

Applicant: Hiroyoshi Maesoba ,  Tetsuji Tanaka ,  Hidetoshi Ishida

Inventor： Hiroyoshi Maesoba ,  Tetsuji Tanaka ,  Hidetoshi Ishida

IPC: G02B6/38

CPC classification number: G02B6/38 ,  G02B6/3869 ,  G02B6/387 ,  G02B6/3877 ,  G02B6/3878

Abstract: A sleeve for an optical connector into which a ferrule arranged to hold an optical fiber is to be inserted, and by which an optical connector in which the sleeve is to be housed can be reduced in size in a direction that the optical connector is fitted into a counterpart optical connector. A sleeve for an optical connector includes a portion having a tube shape, into which a ferrule is to be inserted, and a hook portion at one end of the sleeve, the hook portion protruding in a diameter direction of the tube-shaped portion.

Abstract translation: 用于插入光纤连接器的用于保持光纤的套圈的光学连接器的套筒，并且通过该套筒可以将光学连接器装入的方向减小其中容纳套筒的光学连接器的尺寸 对应的光连接器。 用于光连接器的套筒包括一个具有套管形状的管状部分，套筒一端的钩部分，钩形部分沿着管状部分的直径方向突出。

公开(公告)号：US20110227093A1

公开(公告)日：2011-09-22

申请号：US13150574

申请日：2011-06-01

Applicant: Masahiro HIKITA ,  Hidetoshi ISHIDA ,  Tetsuzo UEDA

Inventor： Masahiro HIKITA ,  Hidetoshi ISHIDA ,  Tetsuzo UEDA

IPC: H01L29/20 ,  H01L21/337 ,  H01L29/808

CPC classification number: H01L29/7786 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/41766 ,  H01L29/66462 ,  H01L29/808

Abstract: The present invention has an object to provide an FET and a method of manufacturing the FET that are capable of increasing the threshold voltage as well as decreasing the on-resistance. The FET of the present invention includes a first undoped GaN layer; a first undoped AlGaN layer formed on the first undoped GaN layer, having a band gap energy greater than that of the first undoped GaN layer; a second undoped GaN layer formed on the first undoped AlGaN layer; a second undoped AlGaN layer formed on the second undoped GaN layer, having a band gap energy greater than that of the second undoped GaN layer; a p-type GaN layer formed in the recess of the second undoped AlGaN layer; a gate electrode formed on the p-type GaN layer; and a source electrode and a drain electrode which are formed in both lateral regions of the gate electrode, wherein a channel is formed at the heterojunction interface between the first undoped GaN layer and the first undoped AlGaN layer.

Abstract translation: 本发明的目的是提供一种能够增加阈值电压以及降低导通电阻的FET和FET的制造方法。 本发明的FET包括第一未掺杂的GaN层; 形成在第一未掺杂的GaN层上的第一未掺杂的AlGaN层，其带隙能量大于第一未掺杂的GaN层的带隙能量; 形成在第一未掺杂的AlGaN层上的第二未掺杂的GaN层; 形成在所述第二未掺杂GaN层上的第二未掺杂AlGaN层，具有大于所述第二未掺杂GaN层的带隙能量的带隙能量; 形成在第二未掺杂AlGaN层的凹部中的p型GaN层; 形成在p型GaN层上的栅电极; 以及形成在所述栅电极的两个横向区域中的源电极和漏电极，其中在所述第一未掺杂的GaN层和所述第一未掺杂的AlGaN层之间的异质结界面处形成沟道。