Abstract:
A test device is provided for testing a bottom chip of a package-on-package (PoP) stacked-chip. An upper surface of the bottom chip has a plurality of soldering points for electrically connecting a plurality of corresponding soldering points of a top chip of the PoP stacked-chip. The test device includes a test head and a plurality of test contacts. The test head has the top chip installed inside. The plurality of test contacts is installed on a lower surface of the test head and electrically connected to the plurality of corresponding soldering points of the top chip inside the test head. When the lower surface of the test head contacts the upper surface of the bottom chip, the plurality of test contacts is electrically connected to the plurality of soldering points for testing the bottom chip.
Abstract:
The disclosure discloses a heating furnace including a housing, a first rack, a chamber, and at least one fan. The first rack is disposed in the housing. The chamber is disposed in the housing and located at a side of the first rack. The chamber includes an inlet, a first sidewall, and a second sidewall. The first sidewall is adjacent to the first rack. The first sidewall has a plurality of vents. The first sidewall and the second sidewall are disposed to face each other. A width is spaced between the first sidewall and the second sidewall, and the width is larger than or equal to 200 mm. The fan is disposed in the housing for generating an airflow to the inlet.
Abstract:
An apparatus for testing a package-on-package semiconductor device includes a top cover, a lower base, a heat dissipation module, and a plurality of probes. The lower base is disposed under the top cover so as to form an internal accommodation space for receiving an upper chip. The heat dissipation module includes a heat sink arranged in the internal accommodation space and attached to an upper surface of the upper chip. The probes are arranged in the lower base so as to electrically connect the upper chip with a lower chip. By the heat sink arranged in the internal accommodation space formed of the top cover and the lower base, heat generated from the upper chip during operation of the upper chip can be greatly dissipated so that the performance and the service life of the upper chip can be improved.
Abstract:
A light-emitting module and a driving method thereof are disclosed. In this method, P light-emitting units are selected as a target group, wherein each of the P light-emitting units has N different power parameters corresponding to N sub-bands. P evaluated current values corresponding to the P light-emitting units are computed according to a target spectrum and the N×P power parameters corresponding to the P light-emitting unit in the target group. An emission-spectrum error is computed according to the target spectrum, the N×P power parameters, and the P evaluated current values. It is determined whether the emission-spectrum error conforms with the determining criteria. When the emission-spectrum error conforms with determining criteria, the P evaluated current values are set to be P driving current values corresponding to the P light-emitting units.
Abstract:
A test apparatus includes a sector conveyance device provided with a plurality of soaking buffers, the soaking buffers being used to carry electronic components, the sector conveyance device being mounted pivotably by a pivot and moved between a test location and a transferring location; a transferring device arranged in correspondence to the transferring location, used to transfer a plurality of electronic components into or out of the sector conveyance device; and a test device arranged in correspondence to the test location for testing electronic components, the electronic components being transferred into the sector conveyance device after test.
Abstract:
A test device is provided for testing a bottom chip of a package-on-package (PoP) stacked-chip. An upper surface of the bottom chip has a plurality of soldering points for electrically connecting a plurality of corresponding soldering points of a top chip of the PoP stacked-chip. The test device includes a test head and a plurality of test contacts. The test head has the top chip installed inside. The plurality of test contacts is installed on a lower surface of the test head and electrically connected to the plurality of corresponding soldering points of the top chip inside the test head. When the lower surface of the test head contacts the upper surface of the bottom chip, the plurality of test contacts is electrically connected to the plurality of soldering points for testing the bottom chip.
Abstract:
A testing system for testing semiconductor package stacking chips is disclosed. The system includes a testing socket, a testing arm, and a testing mechanism. The testing mechanism includes a probe testing device. The probe testing device has a testing chip inside and a plurality of testing probes electrically connected to the testing chip. The plurality of testing probes extends toward the testing socket for contacting a chip-under-test loaded on the testing socket. When the testing mechanism moves to an upper position between the testing socket and the testing arm, the testing arm moves downward in the vertical direction and presses down the testing mechanism thereby coercing the plurality of testing probes in the testing mechanism to closely abut against the chip-under-test, so that the testing chip inside the testing mechanism can electrically connect to the chip-under-test for forming a test loop.
Abstract:
A system and a method for calibration of optical measurement devices are described. In one embodiment, the optical measurement device comprises an imaging lens, and the calibration system includes a projection light source, a lens module, and a projection element. The light emitted from the projection light source passes through the projection element and is projected by the lens module, and then captured by the imaging lens of the optical measurement device. The exit pupil of the lens module in the calibration system is coincident with the entrance pupil of the imaging lens of the optical measurement device, providing a compact and highly efficient optical calibration mechanism.
Abstract:
A heat exchange device and a cooling system are provided. The heat exchange device includes a low-pressure chamber and a high-pressure chamber disposed in the low-pressure chamber. The low-pressure chamber has a first wall for enabling heat exchange and an output portion in communication with the outside to output the low-pressure fluid. The high-pressure chamber has an input portion in communication with the outside to admit the high-pressure fluid and nozzles in communication with the low-pressure chamber. The fluid discharged from the nozzles undergoes a pressure drop and undergoes heat exchange through the first wall. Cooling capability is developed in the heat exchange device and works in the heat exchange device to thereby dispense with a pipeline which must be otherwise provided to link an expansion process and an evaporation process of the fluid and may otherwise cause cooling capability loss, so as to greatly enhance heat exchange capability and cooling efficiency.
Abstract:
The present invention relates to a pogo pin cooling system and a pogo pin cooling method and an electronic device testing apparatus having the system. The system mainly comprises a coolant circulation module, which includes a coolant supply channel communicated with an inlet of a chip socket and a coolant recovery channel communicated with an outlet of the chip socket. When an electronic device is accommodated in the chip socket, the coolant circulation module supplies a coolant into the chip socket through the coolant supply channel and the inlet, and the coolant passes through the pogo pins and then flows into the coolant recovery channel through the outlet.