DEVICE FOR PRESSING ELECTRONIC COMPONENT WITH DIFFERENT DOWNWARD FORCES

    公开(公告)号:US20180292452A1

    公开(公告)日:2018-10-11

    申请号:US15841626

    申请日:2017-12-14

    Abstract: A device for pressing an electronic component with different downward forces includes a first downward-pressure generating device, a depressing head, a second downward-pressure generating device and a depressing piston. The first downward-pressure generating device has the depressing head to apply a first downward pressure to the test socket and a portion of the electronic component. The second downward-pressure generating device has the depressing piston to apply a second downward pressure downward to another portion on the electronic component, so that the electronic component can couple electrically with a plurality of probe of the test socket. Thereupon, at least two downward-pressure generating devices are included to provide at least two different downward pressures to the electronic component solely or simultaneously to the electronic component and the testing equipment, such that specific downward-pressure requirements by precision electronic components can be fulfilled.

    ROTATABLE CUSHIONING PICK-AND-PLACE DEVICE

    公开(公告)号:US20210197405A1

    公开(公告)日:2021-07-01

    申请号:US17063752

    申请日:2020-10-06

    Abstract: A rotatable cushioning pick-and-place device primarily comprises a motor, a body, a cushioning module and a pick-and-place module. The cushioning module is disposed in a first chamber of the body and comprises a rotary bearing which is connected to a drive shaft of the motor, and coupled to a driven shaft sleeve through a rotary follower. The rotary follower is driven by the rotary bearing to drive the driven shaft sleeve to rotate, thereby allowing the rotary bearing to displace relative to the driven shaft sleeve axially. The cushioning spring is arranged between the rotary bearing and the driven shaft sleeve. A first sealing ring and a second sealing ring of the pick-and-place module are fixed on the body to cooperatively and air-tightly seal the second chamber.

    Method and apparatus for testing a package-on-package semiconductor device

    公开(公告)号:US20230349968A1

    公开(公告)日:2023-11-02

    申请号:US18299173

    申请日:2023-04-12

    CPC classification number: G01R31/2896 G01R31/2887 G01R31/2893

    Abstract: The present invention relates to an apparatus for testing a package-on-package semiconductor device, mainly comprising a pick-and-place device, a test socket, an upper chip holder, and a main controller. When a first package device is to be tested, the main controller controls the pick-and-place device to load the first package device into the test socket and then controls the pick-and-place device to transfer the upper chip holder and bring the upper chip holder into electrical contact with the first package device on the test socket so that a second package device in the upper chip holder is electrically connected to the first package device for testing. Accordingly, the upper chip holder is an independent component. Only when a test is executed, the pick-and-place device transfers the upper chip holder onto the test socket so that the second package device is electrically connected to the first package device.

    TEST DEVICE FOR TESTING A POP STACKED-CHIP
    4.
    发明申请
    TEST DEVICE FOR TESTING A POP STACKED-CHIP 有权
    用于测试POP堆叠芯片的测试设备

    公开(公告)号:US20130293254A1

    公开(公告)日:2013-11-07

    申请号:US13875660

    申请日:2013-05-02

    CPC classification number: G01R31/2887 G01R31/2896

    Abstract: A test device is provided for testing a bottom chip of a package-on-package (PoP) stacked-chip. An upper surface of the bottom chip has a plurality of soldering points for electrically connecting a plurality of corresponding soldering points of a top chip of the PoP stacked-chip. The test device includes a test head and a plurality of test contacts. The test head has the top chip installed inside. The plurality of test contacts is installed on a lower surface of the test head and electrically connected to the plurality of corresponding soldering points of the top chip inside the test head. When the lower surface of the test head contacts the upper surface of the bottom chip, the plurality of test contacts is electrically connected to the plurality of soldering points for testing the bottom chip.

    Abstract translation: 提供了一种用于测试封装封装(PoP)堆叠芯片的底部芯片的测试设备。 底部芯片的上表面具有用于电连接PoP堆叠芯片的顶部芯片的多个对应焊接点的多个焊接点。 测试装置包括测试头和多个测试触点。 测试头内部安装了顶部芯片。 多个测试触点安装在测试头的下表面上并电连接到测试头内的顶部芯片的多个对应焊接点。 当测试头的下表面接触底部芯片的上表面时,多个测试触点电连接到多个焊接点以测试底部芯片。

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