公开(公告)号：US11669254B2

公开(公告)日：2023-06-06

申请号：US17491123

申请日：2021-09-30

申请人： Kioxia Corporation

发明人： Saswati Das ,  Manish Kadam

IPC分类号： G06F3/06

CPC分类号： G06F3/0631 ,  G06F3/0604 ,  G06F3/0659 ,  G06F3/0679

摘要： The present invention is directed to an SSD that stores data in a plurality of regions of the SSD, each of the regions associated with a plurality of logical cluster addresses. The SSD also sets a deallocation status of each of the plurality of regions in a deallocate flag bitmap and sets a deallocation status of one or more sections of the deallocate flag bitmap in a deallocate summary table, wherein each of the one or more sections corresponds to more than one of the plurality of regions. In response to a shutdown or loss of power event. The SSD writes to non-volatile memory only sections of the deallocation flag bitmap with a predetermined deallocation status in the deallocate summary table. The SSD stores the deallocate flag bitmap is stored in a first volatile memory and stores the deallocate summary table is stored in a second volatile memory, different from the first volatile memory.

公开(公告)号：US11664807B2

公开(公告)日：2023-05-30

申请号：US17670027

申请日：2022-02-11

申请人： Kabushiki Kaisha Toshiba ,  Toshiba Electronic Devices & Storage Corporation

发明人： Masaki Nishikawa

IPC分类号： H03L7/081 ,  H03L7/14 ,  G01S13/34 ,  G01S7/40

CPC分类号： H03L7/0814 ,  G01S7/4008 ,  G01S13/345 ,  H03L7/146

摘要： A phase correcting device includes a local oscillator that includes an all digital phase-locked loop configured to output a local oscillation signal, a first phase detector configured to detect a phase of the local oscillation signal to output the phase of the local oscillation signal, a reference phase device configured to generate a quasi-reference phase corresponding to a reference phase of the local oscillation signal to output the quasi-reference phase, based on a reference clock, a second phase detector configured to detect a fluctuation amount of a phase of the local oscillator, based on the phase detected by the first phase detector and the quasi-reference phase, and a correction circuit configured to correct the phase of the inputted signal by using a detection result of the second phase detector.

公开(公告)号：US11662942B2

公开(公告)日：2023-05-30

申请号：US17203342

申请日：2021-03-16

申请人： Kioxia Corporation

发明人： Avadhani Shridhar ,  Neil Buxton ,  Steven Wells ,  Nicole Ross

IPC分类号： G06F3/06

CPC分类号： G06F3/0656 ,  G06F3/0613 ,  G06F3/0659 ,  G06F3/0688

摘要： A memory storage system comprising a non-volatile semiconductor memory device comprising a memory array and a plurality of buffers, and a controller in communication with the plurality of buffers. The controller is configured to issue a command to the non-volatile semiconductor memory device specifying a subset of n buffers of the plurality of buffers in which to transfer a data payload relating to the command.

公开(公告)号：US11657834B2

公开(公告)日：2023-05-23

申请号：US17468413

申请日：2021-09-07

申请人： Kabushiki Kaisha Toshiba ,  Toshiba Electronic Devices & Storage Corporation

发明人： Noaki Tagami

IPC分类号： G11B5/596 ,  G11B5/012 ,  G11B21/10

CPC分类号： G11B5/012 ,  G11B5/59638 ,  G11B21/106

摘要： According to one embodiment, a magnetic disk device includes a disk including a first region with a first format efficiency and a second region with a second format efficiency lower than the first format efficiency, a head that writes data to the disk and reads data from the disk, and a controller that selects a first postcode to be written to the first region from a plurality of postcodes with different lengths and writes the first postcode to the first region, and selects a second postcode to be written to the second region from a plurality of postcodes with different lengths and writes the second postcode to the second region.

公开(公告)号：US11651782B2

公开(公告)日：2023-05-16

申请号：US17168639

申请日：2021-02-05

申请人： Kabushiki Kaisha Toshiba ,  Toshiba Electronic Devices & Storage Corporation

发明人： Hiroshi Isokawa

IPC分类号： G11B5/31 ,  G11B5/012 ,  G11B5/23 ,  G11B5/48 ,  G11B25/04 ,  G11B5/00 ,  G11B5/39

CPC分类号： G11B5/3116 ,  G11B5/012 ,  G11B5/23 ,  G11B5/4813 ,  G11B25/043 ,  G11B5/3912 ,  G11B5/3983 ,  G11B2005/0018 ,  G11B2005/0024

摘要： According to one embodiment, among a plurality of magnetic heads, the larger the magnetic pole width of the magnetic pole of the magnetic head in the width direction of a recording track formed in a recording layer or the larger an area width of the magnetic head capable of reading the magnetic characteristics of an area of the recording layer on which magnetic recording has been carried out by means of the magnetic head, the farther is the magnetic head arranged outwardly from the vicinity of the center in the parallel arrangement direction of the magnetic disks.

公开(公告)号：US11646056B2

公开(公告)日：2023-05-09

申请号：US17527027

申请日：2021-11-15

申请人： Kabushiki Kaisha Toshiba ,  Toshiba Electronic Devices & Storage Corporation

发明人： Yuki Sato

IPC分类号： G11B5/48 ,  H05K1/11 ,  H01R12/61 ,  H01R4/04

CPC分类号： G11B5/4853 ,  G11B5/486 ,  H01R12/61 ,  H05K1/116 ,  H05K1/118 ,  H01R4/04 ,  H01R2201/06 ,  H05K2201/09227 ,  H05K2201/09409

摘要： A disk device according to one embodiment includes a recording medium, a magnetic head, a wiring member, and a flexible printed circuit board. The magnetic head is configured to read/write information from/to the recording medium. The wiring member includes a plurality of first terminals, and a plurality of first wires that electrically connect the magnetic head to the first terminals. The flexible printed circuit board includes a surface, a plurality of second terminals located on the surface to be connected to the first terminals by means of a conductive adhesive, and a ground plane spaced apart from the second terminals in a direction along the surface.

公开(公告)号：US11639961B2

公开(公告)日：2023-05-02

申请号：US17016751

申请日：2020-09-10

申请人： Kabushiki Kaisha Toshiba ,  Toshiba Electronic Devices & Storage Corporation

发明人： Kenji Suina

IPC分类号： G01R31/317

摘要： A first circuit outputs a third signal having a first level during a period over which first and second signals have the same level, and having a second level during a period over which the first and second signals have different levels. A second circuit outputs a fifth signal having the first level during a period over which a fourth signal having the same level as the third signal has the same level as the first signal, and having the second level during a period over which the first and fourth signals have different levels. A third circuit outputs a sixth signal having a third level during a period over which the second and fifth signals have the same level, and having a fourth level during a period over which the second and fifth signals have different levels.

公开(公告)号：US11626514B2

公开(公告)日：2023-04-11

申请号：US17007241

申请日：2020-08-31

申请人： Kabushiki Kaisha Toshiba ,  Toshiba Electronic Devices & Storage Corporation

发明人： Hiroyuki Kishimoto ,  Hiroaki Katou

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L27/088 ,  H01L29/06 ,  H01L29/423 ,  H01L29/40 ,  H01L29/08 ,  H01L29/10 ,  H01L29/417

摘要： A semiconductor device includes: a first semiconductor layer of first conductivity type; a second semiconductor layer of first conductivity type provided on the first semiconductor layer; a first semiconductor region of second conductivity type provided on the second semiconductor layer; a second semiconductor region of first conductivity type provided on the first semiconductor region; a first electrode provided in a first trench, the first trench reaching the second semiconductor layer from above the first semiconductor region, the first electrode facing the first semiconductor region via a first insulating film; a second electrode provided in a second trench, the second trench reaching the second semiconductor layer from above the first semiconductor region, the second electrode facing the first semiconductor region via a second insulating film; a third electrode including a first electrode portion, a second electrode portion provided on the first electrode portion and a third electrode portion provided on the second electrode portion, the first electrode portion being provided between the first trench and the second trench, the first electrode portion reaching the first semiconductor region from above the second semiconductor region, the first electrode portion being electrically connected to the first semiconductor region and the second semiconductor region; a third semiconductor region provided between the third electrode and the second semiconductor region provided between the first insulating film and the third electrode, the third semiconductor region having a higher concentration of impurities of second conductivity type than the first semiconductor region; a fourth semiconductor region provided between the third electrode and the second semiconductor region provided between the second insulating film and the third electrode, the fourth semiconductor region having a higher concentration of impurities of second conductivity type than the first semiconductor region; and a fifth semiconductor region provided between the first semiconductor region and the third electrode, the fifth semiconductor region being provided apart from the third semiconductor region and the fourth semiconductor region, the fifth semiconductor region having a higher concentration of impurities of second conductivity type than the first semiconductor region.

公开(公告)号：US11615226B2

公开(公告)日：2023-03-28

申请号：US17017814

申请日：2020-09-11

申请人： Kabushiki Kaisha Toshiba ,  Toshiba Electronic Devices & Storage Corporation

发明人： Hitoshi Imi ,  Motochika Okano ,  Yoshinori Fukuba

IPC分类号： G06F30/30 ,  G06F30/392 ,  G06F30/367 ,  G06F119/08 ,  G06F119/12 ,  G06F119/10

摘要： A recording medium includes simulation data input into a computing device executing a simulation of a semiconductor device, wherein the simulation data includes part shape information describing a shape of a part included in a simulation target circuit, model information describing operation and connection information of the simulation target circuit, and symbol information of the part included in the simulation target circuit, and the computing device causes the part shape information, the model information, and the symbol information to correspond to each other to execute the simulation of the semiconductor device.

公开(公告)号：US11594251B2

公开(公告)日：2023-02-28

申请号：US17565784

申请日：2021-12-30

申请人： Kabushiki Kaisha Toshiba ,  Toshiba Electronic Devices & Storage Corporation

发明人： Yasuhiko Kato

IPC分类号： G11B33/14 ,  G11B33/02 ,  G11B5/60 ,  G11B5/012 ,  G11B25/04 ,  G11B5/00

摘要： According to one embodiment, a disk device includes a disk-shaped recording medium, a base accommodating the recording medium, the base including a bottom wall, a sidewall on a peripheral portion of the bottom wall, and a rib on a part of an upper surface of the sidewall and extending along an entire circumference of the sidewall, a first cover on a part of the upper surface of the sidewall, and a second cover on a first surface of the rib and above the first cover. The rib includes a first region with a first width, a second region with a second width less than the first width, and the first surface with a fixed width around an entire circumference of the rib. The first region and the second region are located corresponding to a side portion of the recording medium.