PAGE BUFFER ENHANCEMENTS
    1.
    发明申请

    公开(公告)号:US20220300199A1

    公开(公告)日:2022-09-22

    申请号:US17203392

    申请日:2021-03-16

    IPC分类号: G06F3/06 G11C16/04

    摘要: A memory storage system comprising a non-volatile semiconductor memory device comprising a memory array and a plurality of buffers, and a controller in communication with the plurality of buffers. The controller may be configured to issue a command to the non-volatile semiconductor memory device to cause a transfer of a data payload from the controller to a subset of n first buffers of the plurality of buffers. The controller may also be configured to issue a command to the non-volatile semiconductor memory device to cause the non-volatile memory device to transfer a data payload from the memory array to a subset of n first buffers of the plurality of buffers.

    PAGE BUFFER ENHANCEMENTS
    3.
    发明公开

    公开(公告)号:US20230305752A1

    公开(公告)日:2023-09-28

    申请号:US18204858

    申请日:2023-06-01

    IPC分类号: G06F3/06 G11C16/04

    摘要: A memory storage system comprising a non-volatile semiconductor memory device comprising a memory array and a plurality of buffers, and a controller in communication with the plurality of buffers. The controller may be configured to issue a command to the non-volatile semiconductor memory device to cause a transfer of a data payload from the controller to a subset of n first buffers of the plurality of buffers. The controller may also be configured to issue a command to the non-volatile semiconductor memory device to cause the non-volatile memory device to transfer a data payload from the memory array to a subset of n first buffers of the plurality of buffers.

    Page buffer enhancements
    4.
    发明授权

    公开(公告)号:US11704061B2

    公开(公告)日:2023-07-18

    申请号:US17203392

    申请日:2021-03-16

    IPC分类号: G06F3/06 G11C16/04 G11C11/56

    摘要: A memory storage system comprising a non-volatile semiconductor memory device comprising a memory array and a plurality of buffers, and a controller in communication with the plurality of buffers. The controller may be configured to issue a command to the non-volatile semiconductor memory device to cause a transfer of a data payload from the controller to a subset of n first buffers of the plurality of buffers. The controller may also be configured to issue a command to the non-volatile semiconductor memory device to cause the non-volatile memory device to transfer a data payload from the memory array to a subset of n first buffers of the plurality of buffers.

    Page buffer enhancements
    5.
    发明授权

    公开(公告)号:US12112070B2

    公开(公告)日:2024-10-08

    申请号:US18204858

    申请日:2023-06-01

    IPC分类号: G06F3/06 G11C16/04 G11C11/56

    摘要: A memory storage system comprising a non-volatile semiconductor memory device comprising a memory array and a plurality of buffers, and a controller in communication with the plurality of buffers. The controller may be configured to issue a command to the non-volatile semiconductor memory device to cause a transfer of a data payload from the controller to a subset of n first buffers of the plurality of buffers. The controller may also be configured to issue a command to the non-volatile semiconductor memory device to cause the non-volatile memory device to transfer a data payload from the memory array to a subset of n first buffers of the plurality of buffers.

    EXPLICIT BUFFER CONTROL
    6.
    发明申请

    公开(公告)号:US20220300194A1

    公开(公告)日:2022-09-22

    申请号:US17203342

    申请日:2021-03-16

    IPC分类号: G06F3/06

    摘要: A memory storage system comprising a non-volatile semiconductor memory device comprising a memory array and a plurality of buffers, and a controller in communication with the plurality of buffers. The controller is configured to issue a command to the non-volatile semiconductor memory device specifying a subset of n buffers of the plurality of buffers in which to transfer a data payload relating to the command.