摘要:
A polarizer includes a waveguide channel having a substantially square cross section and a septum disposed within the waveguide channel. The septum includes a stepped edge and two opposite stepped surfaces. The stepped surfaces are sectionally recessed toward each other along the direction pointing toward the interior of the waveguide channel, wherein the number of the steps of the stepped surface is greater than two, but smaller than the number of the steps of the stepped edge. In one embodiment, the square cross section may include a plurality of rounded corners and a plurality of edges extending correspondingly between the rounded corners, wherein the ratio of the radius of the rounded corner to the distance between two opposite edges is in a range of from 0.05 to 0.3.
摘要:
A dish antenna adjustment method is performed as follows. A dish antenna angle adjustment apparatus is provided; the dish antenna angle adjustment apparatus having a base member, a first rotation member and a second rotation member. The first rotation member is pivotally connected to the second rotation member, and rotates by a first rotation angle relative to the second rotation member. The second rotation member is pivotally connected to the base member, and rotates by a second rotation angle relative to the base member. A first rotating angle adjustment mechanism is connected to the angle adjustment apparatus of the dish antenna, e.g., the first rotating angle adjustment mechanism connects the first rotation member and the second rotation member. The first rotating angle adjustment mechanism adjusts the first rotation angle between the first and second rotation members. The first rotating angle adjustment mechanism is detached from the angle adjustment apparatus, and the detached first rotating angle adjustment mechanism can be used for adjustment of another dish antenna.
摘要:
A system and method for stabilizing a coefficient set used by a digital predistortion (DPD) engine to apply pre-distortion to a transmit signal and cancel distortion generated by a distorting element or distorting system when transmitting the transmit signal, including obtaining an initial coefficient set; rotating the initial coefficient set to maintain a phase of fundamental components (w10(t), . . . , w1Q(t)) of the initial coefficient set as a constant value; averaging in the time domain the rotated coefficient set to obtain an averaged coefficient set; applying the averaged coefficient set to the DPD engine, the initial coefficient set expressed in a first equation [27]; computing the phase of the fundamental components of the initial coefficient set with a second equation [28]; and computing the rotated coefficient set with a third equation [29].
摘要:
An adjustable assembly apparatus includes a waveguide phase shifter and a waveguide multiplexer. The waveguide phase shifter has a first flange structure and the waveguide multiplexer has a second flange structure. The second flange structure and the first flange structure are embedded, and the polarization directions of the waveguide phase shifter and the waveguide multiplexer are orthogonal. In an embodiment, the first flange structure includes a bulge, the second flange structure includes a recess, and the bulge is embedded in the recess. The polarization directions of the bulge of the waveguide phase shifter and the recess of the waveguide multiplexer differ by 90 degrees.
摘要:
A linearizer and method. In a most general embodiment, the inventive linearizer includes a characterizer coupled to an input to and an output from said circuit for generating a set of coefficients and a predistortion engine responsive to said coefficients for predistorting a signal input to said circuit such that said circuit generates a linearized output in response thereto. In a specific application, the circuit is a power amplifier into which a series of pulses are sent during an linearizer initialization mode of operation. In a specific implementation, the characterizer analyzes finite impulse responses of the amplifier in response to the initialization pulses and calculates the coefficients for the feedback compensation filter in response thereto. In the preferred embodiment, the impulse responses are averaged with respect to a threshold to provide combined responses. In the illustrative embodiment, the combined responses are Fast Fourier Transformed, reciprocated and then inverse transformed. The data during normal operation is fed back to the data capture, corrected for distortion in the feedback path from the output of the amplifier, converted to basedband, synchronized and used to provide the coefficients for the predistortion linearization engine. As a result, in the best mode, each of the coefficients used in the predistortion linearization engine can be computed by solving the matrix equation HW=S for W, where W is a vector of the weights, S is a vector of predistortion linearization engine outputs, and H is a matrix of PA return path inputs as taught herein.
摘要:
A low-noise block converter comprises a low-noise amplifier, a local oscillator, a mixer, an IF-amplifier and a regulator. The low-noise amplifier amplifies a high-band received signal. The local oscillator generates a local-frequency signal. The mixer transforms the high-band received signal into an intermediate-frequency signal by mixing the high-band received signal with the generated local-frequency signal. The IF-amplifier amplifies the intermediate-frequency signal. The regulator is connected to the IF-amplifier to provide a steady current (or voltage) to the local oscillator, the mixer and the low-noise amplifier.
摘要:
Receiver signal strength indicator, having an automatic outputting detection circuit, can immediately detect whether its output terminals are connected to a specific apparatus or not. The RSSI comprises an RSSI signal generator, an A/D converter, an automatic outputting detection circuit and at least one output terminal. The automatic outputting detection circuit includes a current detection circuit and an interruption signal generator. When a current passes through the output terminal, the current detection circuit detects the occurrence of the current and generates a push signal. The push signal triggers the interruption signal generator, which in turn generates an interruption signal, and then an RSSI signals are output from the RSSI signal generator due to the interruption signal. The A/D converter converts the RSSI signal into an analog signal. Afterward, the analog signal is output to the exterior through the output terminal.
摘要:
An CMOS interconnection method that permits small source/drain surface areas has been provided. The interconnection is applicable to both strap and via type connections. The surface areas of the small source/drain regions are extended into neighboring field oxide regions by forming a silicide film from the source/drain regions to the field oxide. Interconnections on the same metal level, or to another metal level are made by contact to the silicide covered field oxide. The source/drain regions need only be large enough to accept the silicide film. Transistors with small source/drain regions have smaller drain leakage currents and less parasitic capacitance. A CMOS transistor interconnection apparatus has also been provided.
摘要:
The invention provides a process for depositing fluorinated amorphous carbon (a-F:C) films on IC wafers to provide a low-k interconnect dielectric material. The process, carried out in a PECVD chamber, introduces silane gas (SiH.sub.4) into the mixture of C.sub.4 F.sub.8 and CH.sub.4 gases used to deposit a-F:C films. The silane helps to decrease the fluorine etchants in the deposited film, helping to improve the crosslinks in the deposited product. Film produced in accordance with the present invention has both low-k, generally below 2.4, and high thermal stability, generally above 440.degree. C., allowing for higher thermal anneal temperatures.
摘要翻译:本发明提供了一种在IC晶片上沉积氟化无定形碳(a-F:C)膜以提供低k互连电介质材料的方法。 在PECVD室中进行的方法将硅烷气体(SiH 4)引入用于沉积F-C膜的C 4 F 8和CH 4气体的混合物中。 硅烷有助于减少沉积膜中的氟蚀刻剂,有助于改善沉积产物中的交联。 根据本发明生产的薄膜通常具有低k,通常低于2.4和高热稳定性,通常高于440℃,允许更高的热退火温度。
摘要:
A digital signal processor on an integrated circuit uses a multi-port data flow structure characterized by four ports, referred to as an acquisition port, two data ports, and a coefficient port. All four ports may be bidirectional so that data may be read from and written to the respective ports by the DSP system. This architecture allows a data flow management scheme in which data enters the processor through the acquisition port, or any one of the data ports. As the data is processed, it may ping pong between the data ports, or between a data port and the acquisition port. At the end of a DSP algorithm, the output data may be provided through the acquisition port or a data port as suits the needs of the particular application. A coefficient port is typically used for providing coefficients or twiddle factors for DSP algorithms. A DSP system is provided which includes a digital signal processor having four ports as discussed above. Each data port is attached to dedicated, independent data memory. This provides for optimization of multipass algorithms.