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公开(公告)号：US12088263B2
公开(公告)日：2024-09-10
申请号：US17412823
申请日：2021-08-26
申请人： Qorvo US, Inc.
发明人： Nadim Khlat , Michael R. Kay
CPC分类号： H03F3/245 , H03F1/0222 , H03F3/195 , H03F2200/102 , H03F2200/451
摘要： An equalizer circuit and related power management circuit are provided. The power management circuit includes a voltage amplifier circuit configured to generate an envelope tracking (ET) voltage based on a differential target voltage and provide the ET voltage to a power amplifier circuit(s) via a signal path for amplifying a radio frequency signal(s). An equalizer circuit is provided in the power management circuit to equalize the differential target voltage prior to generating the ET voltage. Specifically, the equalizer circuit is configured to provide a transfer function including a second-order complex-zero term and a real-zero term for offsetting a transfer function of an inherent trace inductance of the signal path and an inherent impedance of the voltage amplifier circuit. By employing the second-order transfer function with the real-zero term, it is possible to reduce distortion in the ET voltage, especially when the RF signal(s) is modulated in a wide modulation bandwidth.
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公开(公告)号：US12081253B2
公开(公告)日：2024-09-03
申请号：US18352424
申请日：2023-07-14
CPC分类号： H04B1/16 , H03F3/19 , H03F3/245 , H04L27/06 , H03F2200/451
摘要： A method for calibrating the DC operating point of a PWM receiver circuit is disclosed. The PWM receiving circuit includes an envelope detector having a first resistor string, and includes a bias circuit having a second resistor string and a plurality of switches. The second resistor string is coupled between a supply voltage and a reference voltage and functions as a voltage divider. Each switch, when closed, accesses a second voltage at a node of the second resistor string connected to the closed switch. To perform the calibration process, the plurality of switches is closed one at a time, and the second voltage is compared with a first voltage at a first node of the first resistor string. The switch that, when closed, produces the smallest difference between the first voltage and the second voltage remains closed after the calibration process, and is used for demodulating the PWM signal.
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公开(公告)号：US20240291454A1
公开(公告)日：2024-08-29
申请号：US18659409
申请日：2024-05-09
申请人： Qorvo US, Inc.
CPC分类号： H03F3/604 , H03F3/195 , H03F3/245 , H03F2200/198 , H03F2200/451 , H03F2200/537 , H03F2200/543
摘要： Disclosed is a reconfigurable power amplifier having a 2N−1 number of input-side reconfigurable quadrature couplers connected in a tree structure, wherein a 2(N−1) number of the input-side reconfigurable quadrature couplers have coupler output terminals, and a root of the tree structure is one of the input-side reconfigurable quadrature couplers having a main input terminal. Also included is a 2N−1 number of output-side reconfigurable quadrature couplers connected in a tree structure, wherein a 2(N−1) number of the output-side reconfigurable quadrature couplers have coupler input terminals, and a root of the tree structure is one of the output-side reconfigurable quadrature couplers having a main output terminal. Further included is a 2N number of constituent amplifiers divided into amplifier pairs having amplifier input terminals connected to corresponding ones of the coupler output terminals and having amplifier output terminals coupled to corresponding ones of the coupler input terminals.
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公开(公告)号：US20240291450A1
公开(公告)日：2024-08-29
申请号：US18586938
申请日：2024-02-26
发明人： Makoto TABEI
CPC分类号： H03F3/245 , H03F1/56 , H03F2200/387
摘要： An amplifier circuit includes: a second FET connected, together with a first FET, between a power supply and a reference potential; a first voltage divider resistor circuit; a first switch element; a second voltage divider resistor circuit; a third voltage divider resistor circuit; and a second switch element. The first FET and the second FET have their adjacent drains and sources connected. Each resistance value of the second voltage divider resistor circuit is greater than each resistance value of the first voltage divider resistor circuit. Each resistance value of the third voltage divider resistor circuit is less than each resistance value of the second voltage divider resistor circuit. The second voltage divider resistor circuit and the third voltage divider resistor circuit have an identical voltage division ratio.
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公开(公告)号：US12074830B2
公开(公告)日：2024-08-27
申请号：US17434808
申请日：2020-03-25
发明人： Meng-Jie Hsiao , Cam V. Nguyen
CPC分类号： H04L5/1438 , H01P5/12 , H03F3/245 , H03F2200/294 , H03F2200/451
摘要： Architectures of millimeter-wave (mm-wave) fully-integrated frequency-division duplex (FDD) transmitting-receiving (T/R) front-end (FE) modules include a duplexer (DUX), power amplifier (PA), and low noise amplifier (LNA) on a single semiconductor substrate to facilitate the development of system on a chip (SoC) for mm-wave 5th Generation (5G) wireless communications applications. The first FE module adopts a passive DUX consisting of Wilkinson power divider and ground-center-tap transformer to achieve high isolation between PA output and LNA inputs. Another FE module combines the advantages of passive DUX and power-efficient cancellation circuits to accomplish high TX-RX isolation and low noise performance at the same time. The DUX can stand alone as a single unit in a system and is used together with external PA and LNA provided in the system, or it can include its own internal PA and LNA to form a DUX FE module.
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公开(公告)号：US12068720B2
公开(公告)日：2024-08-20
申请号：US17351560
申请日：2021-06-18
申请人： Qorvo US, Inc.
发明人： Nadim Khlat
CPC分类号： H03F1/0288 , H03F3/245 , H04B1/04 , H03F2200/105 , H03F2200/451 , H04B2001/045
摘要： A barely Doherty dual envelope tracking (BD2E) circuit has a transmitter chain that includes an envelope tracking (ET) circuit that controls a Doherty dual power amplifier array. The ET circuit provides two control signals (supply voltage signals) that are used to control or modulate a carrier amplifier and a peaking amplifier independently of one another. The BD2E circuit includes an improved impedance inverter that isolates the peaking amplifier from the carrier amplifier to allow this independent control. By providing independent control, greater linearity may be provided while preserving the efficiency of the circuit.
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公开(公告)号：US20240275343A1
公开(公告)日：2024-08-15
申请号：US18648789
申请日：2024-04-29
CPC分类号： H03F3/245 , H03F1/0211 , H04B1/40 , H03F2200/294 , H03F2200/451
摘要： A load line impedance modulation circuit includes a magnetic circuit, an adjustable capacitance coupled to an output of the magnetic circuit, and a plurality of adjustable resistances coupled to the output of the magnetic circuit, wherein the plurality of adjustable resistances are configured to select from available output ports, an impedance presented by the load line impedance modulation circuit being adjustable dependent on at least a number of selected output ports.
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公开(公告)号：US12063017B2
公开(公告)日：2024-08-13
申请号：US17339735
申请日：2021-06-04
CPC分类号： H03F3/24 , H03F3/195 , H03F3/245 , H03F3/68 , H03F3/72 , H03F2200/111 , H03F2200/451
摘要： Aspects of this disclosure relate to a multi-mode power amplifier system. A first power amplifier is configured to provide a radio frequency signal associated with a different radio access technology in a first mode than in a second mode. A second power amplifier is configured to be active in the first mode such that the first power amplifier and the second power amplifier are concurrently active in the first mode. A switch can electrically connect the output of the first power amplifier to different radio frequency signal path in the first mode than in the second mode. Related methods, power amplifier modules, and wireless communication devices are disclosed.
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公开(公告)号：US20240267010A1
公开(公告)日：2024-08-08
申请号：US18106899
申请日：2023-02-07
申请人： Apple Inc.
发明人： Simone Gambini
CPC分类号： H03F3/245 , H04B1/40 , H03F2200/451 , H03F2203/21151
摘要： This disclosure is directed to a power amplifier (PA) including circuitry to amplify and filter transmission signals in a radio frequency (RF) circuit. The PA may include multiple core amplifiers coupled to a power combiner to amplify and filter the transmission signals. For example, the PA may activate the core amplifiers to provide the transmission signals with a peak output power. Alternatively, the PA may activate a reduced number of the core amplifiers to provide the transmission signals with a reduced output power lower than the peak output power. Activating a portion of the PA when providing the transmission signals with a reduced output power may reduce a power consumption and improve power efficiency of the PA.
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30.发明公开公开(公告)号：US20240267009A1
公开(公告)日：2024-08-08
申请号：US17921750
申请日：2022-06-14
发明人： Pengbo DU , Yu Wang , Zhaotan Cui , Xuelong Jiao , Zhipeng Ren , Hanbin Qu
CPC分类号： H03F3/245 , H03F1/56 , H03F2200/222 , H03F2200/451
摘要： The present disclosure provides a Ka-band gallium-nitride (GaN) monolithic-microwave integrated circuit (MMIC) power amplifier circuit and an amplifier, and belongs to the field of MMIC amplifiers. The circuit includes: a plurality of cascade-connected amplification modules. A first amplification module includes a first amplification unit, and each of the other amplification modules includes a matching network unit and an amplification unit. A microstrip line ML1 in matching network unit includes one terminal connected to an output terminal of a front-stage amplification unit and the other terminal connected to one terminal of a microstrip line ML2 and one terminal of a capacitor C1. The other terminal of the microstrip line ML2 is connected to an input terminal of a current amplification unit. The other terminal of the capacitor C1 is grounded.
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