公开(公告)号：US09543905B2

公开(公告)日：2017-01-10

申请号：US14594773

申请日：2015-01-12

申请人： Seiko Instruments Inc.

发明人： Tsutomu Tomioka

IPC分类号： H03F1/52 ,  H03F1/22

CPC分类号： H03F1/523 ,  H03F1/223 ,  H03F2200/441

摘要： Provided is an amplifier circuit including an NMOS transistor having a low drain breakdown voltage and an NMOS transistor having a high drain breakdown voltage connected in series thereto, and capable of preventing breakdown of a drain of the NMOS transistor having a low drain breakdown voltage. A clamp circuit configured to limit a drain voltage of the NMOS transistor having a low drain breakdown voltage is connected to the drain thereof.

摘要翻译： 提供了包括具有低漏极击穿电压的NMOS晶体管和具有与其串联连接的高漏极击穿电压的NMOS晶体管的放大器电路，并且能够防止具有低漏极击穿电压的NMOS晶体管的漏极击穿。 配置成限制具有低漏极击穿电压的NMOS晶体管的漏极电压的钳位电路连接到其漏极。

公开(公告)号：US09461598B2

公开(公告)日：2016-10-04

申请号：US14613455

申请日：2015-02-04

申请人： STMicroelectronics (Shenzhen) R&D Co. Ltd ,  STMicroelectronics S.r.l.

发明人： Kelvin Jian Wen ,  Mei Yang ,  Zheng Hua Song ,  Xian Xiong ,  Cristiano Meroni

IPC分类号： H03F3/45 ,  H03F3/187

CPC分类号： H03F3/187 ,  H03F3/45475 ,  H03F3/45941 ,  H03F2200/03 ,  H03F2200/441 ,  H03F2203/45138 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45528 ,  H03F2203/45541

摘要： A power amplifier includes a clamping circuit configured to provide a clamped voltage from a power supply; an amplifier pair having first inputs coupled to the clamping circuit, second inputs and an output for providing an amplified signal; and a biasing circuit coupled between the clamping circuit and the second inputs. The biasing circuit is configured to adjust input bias voltages of the amplifier pair such that the output of the amplifier pair varies proportionally to a change of the power supply.

摘要翻译： 功率放大器包括被配置为提供来自电源的钳位电压的钳位电路; 放大器对，其具有耦合到所述钳位电路的第一输入，第二输入和用于提供放大信号的输出; 以及耦合在所述钳位电路和所述第二输入之间的偏置电路。 偏置电路被配置为调整放大器对的输入偏置电压，使得放大器对的输出与电源的变化成比例地变化。

公开(公告)号：US09276531B2

公开(公告)日：2016-03-01

申请号：US14262255

申请日：2014-04-25

申请人： Analog Devices, Inc.

发明人： Moshe Gerstenhaber ,  Rayal Johnson

IPC分类号： H03F1/52 ,  H03F3/16

CPC分类号： H03F1/523 ,  H03F3/16 ,  H03F3/45475 ,  H03F2200/441 ,  H03F2200/471 ,  H03F2203/45552

摘要： Apparatus and methods for amplifier input protection are provided. In certain implementations, an amplifier input protection circuit includes a first JFET electrically connected between a first input and a first output, and a second JFET electrically connected between a second input and a second output. Additionally, a first clamp is electrically connected to the first output, and a second clamp is electrically connected to the second output. A first current mirror mirrors a current through the first clamp, and provides the mirrored current to a third JFET electrically connected between the first JFET's source and gate. Additionally, a second current mirror that mirrors a current through the second clamp, and provides the mirrored current to a fourth JFET that is electrically connected between a source and gate of the second JFET. Configuring the protection circuit in this manner can provide the benefits of both low noise and low fault current.

摘要翻译： 提供放大器输入保护的装置和方法。 在某些实施方案中，放大器输入保护电路包括电连接在第一输入端和第一输出端之间的第一JFET以及电连接在第二输入端和第二输出端之间的第二JFET。 另外，第一钳位电连接到第一输出端，​​第二钳位电连接到第二输出。 第一电流镜反射通过第一夹具的电流，并将镜像电流提供到电连接在第一JFET源极和栅极之间的第三JFET。 另外，第二电流镜反射通过第二夹具的电流，并且将镜像电流提供给电连接在第二JFET的源极和栅极之间的第四JFET。 以这种方式配置保护电路可以提供低噪声和低故障电流的优点。

公开(公告)号：US09136796B2

公开(公告)日：2015-09-15

申请号：US13920302

申请日：2013-06-18

申请人： Texas Instruments Incorporated

发明人： David H. Elwart, II ,  Vikas Suma Vinay ,  Christopher M. Graves ,  Baher S. Haroun

IPC分类号： H04B15/00 ,  H03F1/30 ,  H02H9/04

CPC分类号： H03F1/305 ,  H02H9/045 ,  H03F1/523 ,  H03F3/187 ,  H03F3/68 ,  H03F2200/441 ,  H03F2200/444 ,  H03F2200/555 ,  H03K17/6874 ,  H03K2217/0018

摘要： Self-grounded circuitry (10) includes a signal channel conducting an output voltage (VOUT1). A charge pump (2) powered by a reference voltage (VDD) produces a control voltage (VCP). The control signal is at a low level if the reference voltage is low and is boosted to a high level if the reference voltage is high. A ground switch circuit (15) includes a depletion mode transistor (MP1) having a source coupled to the output voltage, a gate coupled to the control voltage, and a drain coupled to ground. The transistor includes a well region (4-1) and a parasitic substrate diode (D3-1). A negative voltage protection circuit (17-1) includes a depletion mode first protection transistor (MP3-1) having a drain coupled to the well region, a source coupled to a source of a depletion mode second protection transistor (MP4-1) having a drain coupled to the output voltage, the first and second protection transistors each having a gate coupled to the control voltage, and also includes a diode (MN1) coupled to charge the well region from the control voltage conductor to prevent distortion of the output voltage.

摘要翻译： 自接地电路（10）包括传导输出电压（VOUT1）的信号通道。 由参考电压（VDD）供电的电荷泵（2）产生控制电压（VCP）。 如果参考电压较低，则控制信号处于低电平，并且如果参考电压高，则其升压到高电平。 接地开关电路（15）包括具有耦合到输出电压的源极的耗尽型晶体管（MP1），耦合到控制电压的栅极和耦合到地的漏极。 晶体管包括阱区（4-1）和寄生衬底二极管（D3-1）。 负电压保护电路（17-1）包括具有耦合到阱区的漏极的耗尽型第一保护晶体管（MP3-1），耦合到耗尽型第二保护晶体管（MP4-1）的源极的源极， 耦合到输出电压的漏极，第一和第二保护晶体管各自具有耦合到控制电压的栅极，并且还包括耦合到从控制电压导体对阱区域充电的二极管（MN1），以防止输出电压的失真 。

公开(公告)号：US20150207468A1

公开(公告)日：2015-07-23

申请号：US14594773

申请日：2015-01-12

申请人： Seiko Instruments Inc.

发明人： Tsutomu TOMIOKA

IPC分类号： H03F1/52 ,  H03F3/16

CPC分类号： H03F1/523 ,  H03F1/223 ,  H03F2200/441

摘要： Provided is an amplifier circuit including an NMOS transistor having a low drain breakdown voltage and an NMOS transistor having a high drain breakdown voltage connected in series thereto, and capable of preventing breakdown of a drain of the NMOS transistor having a low drain breakdown voltage. A clamp circuit configured to limit a drain voltage of the NMOS transistor having a low drain breakdown voltage is connected to the drain thereof.

摘要翻译： 提供了包括具有低漏极击穿电压的NMOS晶体管和具有与其串联连接的高漏极击穿电压的NMOS晶体管的放大器电路，并且能够防止具有低漏极击穿电压的NMOS晶体管的漏极击穿。 配置成限制具有低漏极击穿电压的NMOS晶体管的漏极电压的钳位电路连接到其漏极。

公开(公告)号：US20120326791A1

公开(公告)日：2012-12-27

申请号：US13523851

申请日：2012-06-14

申请人： Yung-Ming Lee ,  Tzu-Fei Han

发明人： Yung-Ming Lee ,  Tzu-Fei Han

IPC分类号： H03G3/00

CPC分类号： H03F1/26 ,  H03F2200/03 ,  H03F2200/411 ,  H03F2200/441 ,  H03G11/002

摘要： A voltage clamping module is disposed at an output terminal of a gain amplifying module, so that a voltage level of an amplifying signal outputted by the gain amplifying module can be clamped within a predetermined range. The voltage clamping module includes an upper bound voltage clamping module, which is utilized for limiting the voltage level of the amplifying signal to be lower than an upper bound voltage level, and a lower bound voltage clamping module, which is utilized for limiting the voltage level of the amplifying signal to be higher than a lower bound voltage level.

摘要翻译： 电压钳位模块设置在增益放大模块的输出端，使得增益放大模块输出的放大信号的电压电平可以钳位在预定范围内。 电压钳位模块包括用于将放大信号的电压电平限制为低于上限电压电平的上限电压钳位模块和用于限制电压电平的下限钳位模块 的放大信号高于下限电压电平。

公开(公告)号：US20100309594A1

公开(公告)日：2010-12-09

申请号：US12793635

申请日：2010-06-03

申请人： Hirohiko SADAMATSU ,  Tetsuji Funaki ,  Norio Nagase

发明人： Hirohiko SADAMATSU ,  Tetsuji Funaki ,  Norio Nagase

IPC分类号： H02H9/04

CPC分类号： H03F3/195 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49112 ,  H01L2924/13091 ,  H01L2924/30107 ,  H03F1/52 ,  H03F2200/441 ,  H03F2200/444 ,  H01L2924/00014 ,  H01L2924/00

摘要： An integrated circuit device includes a first power supply domain and a second power supply domain, wherein the first power supply domain includes a first power supply line and a second power supply line, an internal circuit between the first power supply line and the second power supply line, a first clamp circuit that electrically couples between the first power supply line and the second power supply line when a certain potential difference is generated between the first power supply line and the second power supply line, and at least one of a junction element that is between the first clamp circuit and the first power supply line and a junction element that is between the first clamp circuit and the second power supply line, the junction element allowing current to flow when the first clamp circuit becomes electrically conductive.

摘要翻译： 集成电路装置包括第一电源域和第二电源域，其中第一电源域包括第一电源线和第二电源线，第一电源线和第二电源之间的内部电路 线，当在第一电源线和第二电源线之间产生一定的电位差时，第一钳位电路在第一电源线和第二电源线之间电耦合，以及至少一个连接元件， 在第一钳位电路和第一电源线之间以及在第一钳位电路和第二电源线之间的接合元件，当第一钳位电路变得导电时，接合元件允许电流流动。

公开(公告)号：US20100171552A1

公开(公告)日：2010-07-08

申请号：US12647022

申请日：2009-12-24

申请人： John B. French ,  Andrew J. Mason

发明人： John B. French ,  Andrew J. Mason

IPC分类号： H03F1/00

CPC分类号： H03F3/3076 ,  H03F1/0227 ,  H03F3/187 ,  H03F3/68 ,  H03F2200/03 ,  H03F2200/102 ,  H03F2200/33 ,  H03F2200/411 ,  H03F2200/441 ,  H03F2200/504 ,  H03F2200/78

摘要： Several push-pull linear hybrid class H amplifiers are disclosed. A split power rail provides a positive supply rail and a negative supply rail in response to a power supply control voltage. A push-pull amplifier stage is powered by the positive and negative supply rails. The amplifier stage receives an input signal and provides a corresponding amplified output signal. A power supply control circuit provides the power supply control voltage in response to the smaller of the positive and negative supply rails, and the input signal.

摘要翻译： 公开了几个推挽线性混合级H放大器。 分流电源轨提供正电源轨和负电源轨以响应电源控制电压。 推挽放大器级由正负电源电源供电。 放大器级接收输入信号并提供相应的放大输出信号。 电源控制电路响应于正负电源轨和输入信号中的较小者提供电源控制电压。

公开(公告)号：US07583138B1

公开(公告)日：2009-09-01

申请号：US11983784

申请日：2007-11-09

申请人： Frank DeStasi ,  Michael Eugene Broach

发明人： Frank DeStasi ,  Michael Eugene Broach

IPC分类号： H03F3/38

CPC分类号： H03F3/45183 ,  H03F2200/411 ,  H03F2200/441 ,  H03F2203/45674 ,  H03F2203/45692 ,  H03F2203/45726 ,  H03F2203/45728

摘要： A system and a method are disclosed for controlling an error amplifier between control mode changes. An error amplifier comprises a first stage that comprises a first current source and a second stage that comprises a second current source and at least one compensation component that is connected to the first stage through a signal line. A buffer circuit is connected between the signal line and the at least one compensation component and a switch circuit is connected between the buffer circuit and the at least one compensation component. When switched in to the error amplifier the buffer circuit provides a value of current to the at least one compensation component that is larger than a value of current that is provided to the at least one compensation component from the signal line. This increases the slew rate of the error amplifier during a pulse frequency modulation control mode.

摘要翻译： 公开了用于在控制模式改变之间控制误差放大器的系统和方法。 误差放大器包括第一级，其包括第一电流源和第二级，其包括第二电流源和通过信号线连接到第一级的至少一个补偿部件。 缓冲电路连接在信号线和至少一个补偿部件之间，并且开关电路连接在缓冲电路和至少一个补偿部件之间。 当切换到误差放大器时，缓冲电路向至少一个补偿分量提供大于从信号线提供给至少一个补偿分量的电流值的电流值。 这在脉冲频率调制控制模式下增加误差放大器的转换速率。

公开(公告)号：US20070206395A1

公开(公告)日：2007-09-06

申请号：US11619246

申请日：2007-01-03

申请人： Daniel Lincoln ,  Paul Bennett

发明人： Daniel Lincoln ,  Paul Bennett

IPC分类号： H02H7/122 ,  H03F1/00

CPC分类号： H02H7/122 ,  H02M7/48 ,  H02M7/493 ,  H02M7/537 ,  H02M7/538 ,  H02M7/5387 ,  H03F1/52 ,  H03F3/2173 ,  H03F3/2176 ,  H03F2200/33 ,  H03F2200/441

摘要： A power supply including an inverter receiving a DC input signal from a DC input source (11). The inverter is implemented as a single-ended inverter. Each inverter is driven by a signal source (13A, 13B), which outputs an AC signal. The output from each inverter is input to a first stage harmonic filter. The power supply includes an output circuit that includes a rectifier (D1) arranged about a point so that if the inverter attempts to drive the point beyond a predetermined voltage, the rectifier conducts in order to return at least one of power and current to the DC input source. The output from the first harmonic filter (L1A, C1; L1B, C1) is output to a second harmonic filter (L2, C2) and is then output from the power supply.

摘要翻译： 一种电源，包括从DC输入源（11）接收DC输入信号的逆变器。 逆变器实现为单端逆变器。 每个逆变器由输出AC信号的信号源（13A，13B）驱动。 每个逆变器的输出输入到第一级谐波滤波器。 电源包括输出电路，其包括围绕点布置的整流器（D1），使得如果逆变器试图将点驱动超过预定电压，则整流器进行导通，以将功率和电流中的至少一个返回到 直流输入源。 来自第一谐波滤波器（L 1 A，C 1; L 1 B，C 1）的输出被输出到二次谐波滤波器（L 2，C 2），然后从电源输出。