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公开(公告)号：US11784856B2
公开(公告)日：2023-10-10
申请号：US17156437
申请日：2021-01-22
发明人： Dianyong Chen , Rajiv Shukla , Bengt Littmann
IPC分类号： H04L1/00 , H04L25/03 , G06F1/10 , H04L7/04 , H04L49/552
CPC分类号： H04L25/03286 , G06F1/10 , H04L7/048 , H04L49/552
摘要： A combined error checker and sequence generator which shares a LFSR is disclosed which reduces complexity, cost, and area required for implementation while also improving timing margin. A clock and data recovery system recovers a data signal received over a channel from a remote transceiver. Control logic selects different modes of operation of the system. An error detector compares the two sequence signals and records errors in response to differences between the two sequence signals. A sequence generator generates a sequence signal for use by the error detector as a reference sequence signal or for transmission to a remote transceiver. The system includes one or more switching elements configured to selectively route the generated sequence as feedback into the sequence generator or the received sequence signal into the sequence generator subject to whether the combined error checker and sequence generator is in error checker mode or sequence generator mode.
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公开(公告)号：US20230319995A1
公开(公告)日：2023-10-05
申请号：US17711509
申请日：2022-04-01
发明人： Benone Achiriloaie
CPC分类号： H05K1/144 , H01R12/721 , H05K1/141 , H05K1/024 , H05K2201/10098
摘要： Radio frequency (RF) power pallets including primary or first circuit boards and daughter or second circuit boards are described. An example RF power pallet includes a first circuit board comprising a first side, a second side, a first metal layer, and a second metal layer. The power pallet also includes an RF power amplifier coupled to the first metal layer and a second circuit board electrically coupled to the first metal layer. The second circuit board includes a bias voltage driver for the RF power amplifier, and the first metal layer includes a bias voltage trace that extends from a contact of the second circuit board to a gate of the power amplifier. The second circuit board extends the features of the RF pallet, while avoiding some increases in size, costs, and complexity that would typically be associated with the new features.
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公开(公告)号：US11736075B2
公开(公告)日：2023-08-22
申请号：US17220086
申请日：2021-04-01
发明人： Andre Rossberg
CPC分类号： H03F3/2175 , H03F1/0261 , H03M1/70
摘要： An amplifier circuit is capable of switching between a unipolar output voltage domain and a bipolar output voltage domain. The amplifier circuit comprises an operational amplifier with a feedback circuit that is configurable using switches. By controlling the switches, the amplifier's feedback circuit can switched between two different arrangements having a positive and a negative signal gain, respectively. The amplifier circuit is designed such that the noise gain is the same in both operating modes, allowing a single noise compensation approach to be used for both operating modes. Since configurability of the circuit is achieved using static switches, the amplifier circuit maintains high accuracy and experiences no appreciable impact on power consumption as a result of implementing the switching.
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公开(公告)号：US11716058B2
公开(公告)日：2023-08-01
申请号：US17668758
申请日：2022-02-10
发明人： Gerard Bouisse
CPC分类号： H03F1/0288 , H03F1/32 , H03F1/42 , H03F3/245 , H03F2200/451
摘要： Apparatus and methods for a multiclass, broadband, no-load-modulation power amplifier are described. The power amplifier (500) may include a main amplifier (532) operating in a first amplification class and a plurality of peaking amplifiers (536, 537, 538) operating in a second amplification class. The main amplifier (532) and peaking amplifiers (536, 537, 538) may operate in parallel on portions of signals derived from an input signal to be amplified. The main amplifier (532) may see no modulation of its load impedance between a fully-on state of the power amplifier (all amplifiers amplifying) and a fully backed-off state (peaking amplifiers idle). By avoiding load modulation, the power amplifier (500) can exhibit improved bandwidth and efficiency compared to conventional Doherty amplifiers.
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公开(公告)号：US11689175B2
公开(公告)日：2023-06-27
申请号：US17813778
申请日：2022-07-20
发明人： Robert Sadler , David Runton
IPC分类号： H03H7/38
摘要： A multicomponent network may be added to a transmission line in a high-frequency circuit to transform a first impedance of a downstream circuit element to second impedance that better matches the impedance of an upstream circuit element. The multicomponent network may be added at a distance more than one-quarter wavelength from the downstream circuit element, and can tighten a frequency response of the impedance-transforming circuit to maintain low Q values and low VSWR values over a broad range of frequencies.
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公开(公告)号：US20230187354A1
公开(公告)日：2023-06-15
申请号：US17552306
申请日：2021-12-15
发明人： Yohan Piccin
IPC分类号： H01L23/528 , H01L23/522
CPC分类号： H01L23/5286 , H01L23/5226
摘要： A semiconductor circuit configured to reduce electromigration. The circuit comprises a power rail and ground rail located on a first layer. A power finger and a ground finger are located on a second layer. Cells are located on the second layer, such that the one or more cells are electrically connected to a power finger and a ground finger. The circuit also includes one or more power vias electrically connecting the power rail to the power finger. The one or more power vias extend from the first layer to the second layer. One or more ground vias electrically connecting the ground rail to the ground finger, such that the one or more ground vias extend from the first layer to the second layer. The placement of the fingers on a different level than the rails establishing the fingers as non-contiguous sections thereby reducing electromigration and overcoming design analysis errors.
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公开(公告)号：US11676860B2
公开(公告)日：2023-06-13
申请号：US16165719
申请日：2018-10-19
IPC分类号： H01L21/768 , H01L23/532 , H01L21/78 , H01L23/48
CPC分类号： H01L21/7685 , H01L21/76898 , H01L21/78 , H01L23/481 , H01L23/53252 , H01L21/76843
摘要： A method involving a barrier for preventing eutectic break-through in through-substrate vias is disclosed. The method generally includes steps (A) to (D). Step (A) may form one or more vias through a substrate. The substrate generally comprises a semiconductor. Step (B) may form a first metal layer. Step (C) may form a barrier layer. The barrier layer generally resides between the vias and the first metal layer. Step (D) may form a second metal layer. The second metal layer may be in electrical contact with the first metal layer through the vias and the barrier layer.
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公开(公告)号：US20230170857A1
公开(公告)日：2023-06-01
申请号：US17456781
申请日：2021-11-29
发明人： Wayne Mack Struble
CPC分类号： H03F3/245 , H03F3/195 , H03F1/0205 , H03F1/223 , H03F2200/451
摘要： A power amplifier has an amplifier cell with an input terminal receiving an input signal and an output terminal providing an output signal. A bias network is coupled to the output terminal of the amplifier cell to provide a bias signal to the amplifier cell. A shutdown circuit is coupled to the bias network to disable the bias network in response to the input signal. The shutdown circuit has a transistor with a first conduction terminal coupled to the bias network, a second conduction terminal coupled to a power supply terminal. The shutdown circuit further has a first resistor with a first terminal coupled to the input terminal, and a second resistor with a first terminal coupled to a second terminal of the first resistor at a node, and a second terminal coupled to the power supply terminal. The control terminal of the transistor is coupled to the node.
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公开(公告)号：US20230126332A1
公开(公告)日：2023-04-27
申请号：US17952475
申请日：2022-09-26
发明人： Yunchu Li , Richard R. Grzybowski
摘要： An optical coupling system for coupling a light source to a photonic integrated circuit (PIC) comprises a multimode coupler configured to receive an input optical signal of a first mode. The multimode coupler triggers one or more higher-order modes from the input optical signal of the first mode. The optical coupling system also includes a mode de-multiplexer and an optical combiner. The mode de-multiplexer transfers the input optical signal of the first mode and one or more optical signals of the triggered one or more higher-order modes to respective output optical signals of the first mode. The optical combiner combines the respective output optical signals to produce a single output signal of the first mode.
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公开(公告)号：US20230116579A1
公开(公告)日：2023-04-13
申请号：US17495924
申请日：2021-10-07
发明人： Jean-Marc Mourant
摘要： An enhanced current mirror can be utilized to accurately control a bias current associated with an amplifier. A current controller component (CCC) can employ the enhanced current mirror and can be associated with the amplifier. The CCC can comprise a comparator that can compare an adjusted supply voltage level to a reference voltage level, the adjusted supply voltage level relating to a supply voltage level of a supply voltage supplied to the amplifier and CCC. The CCC can control switching of an operational state of a transistor of the comparator to switch in or out a resistance of a reference resistor component associated with the supply voltage, based on a result of the comparison of the adjusted supply voltage level to the reference voltage level, to facilitate accurately controlling an amount of bias current associated with the amplifier. The CCC and amplifier can be situated on the same die.
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