-
公开(公告)号:US11257886B2
公开(公告)日:2022-02-22
申请号:US16591966
申请日:2019-10-03
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Joon Woo Bae , So Young Koo , Han Bit Kim , Thanh Tien Nguyen , Kyoung Won Lee , Yong Su Lee , Jae Seob Lee , Gyoo Chul Jo
IPC: H01L27/32 , H01L51/52 , H01L29/786 , H01L27/12
Abstract: An organic light emitting diode display according to an exemplary embodiment includes: a substrate; a first buffer layer on the substrate; a first semiconductor layer on the first buffer layer; a first gate insulating layer on the first semiconductor layer; a first gate electrode and a blocking layer on the first gate insulating layer; a second buffer layer on the first gate electrode; a second semiconductor layer on the second buffer layer; a second gate insulating layer on the second semiconductor layer; and a second gate electrode on the second gate insulating layer.
-
公开(公告)号:US11227875B2
公开(公告)日:2022-01-18
申请号:US16836651
申请日:2020-03-31
Applicant: Samsung Display Co., Ltd.
Inventor: Myoung Hwa Kim , Joon Seok Park , So Young Koo , Tae Sang Kim , Yeon Keon Moon , Geun Chul Park , Jun Hyung Lim , Kyung Jin Jeon
Abstract: A display device includes a pixel connected to a scan line, and a data line crossing the scan line, wherein the pixel includes a light-emitting element, a driving transistor configured to control a driving current supplied to the light-emitting element according to a data voltage applied from the data line, and a first switching transistor configured to apply the data voltage of the data line to the driving transistor according to a scan signal that is applied to the scan line. The driving transistor includes a first active layer including an oxide semiconductor, and a first oxide layer disposed on the first active layer and including an oxide semiconductor. The first switching transistor includes a second active layer including an oxide semiconductor, and the first oxide layer is not disposed on the second active layer.
-
公开(公告)号:US09791987B2
公开(公告)日:2017-10-17
申请号:US14833358
申请日:2015-08-24
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: So Young Koo , Jong Chan Lee , Yoon Ho Khang , Sun Haeng Cho
CPC classification number: G06F3/044 , G06F3/041 , G06F3/0412 , G06F2203/04103
Abstract: A touch screen panel includes a substrate, a plurality of touch electrodes in a touch area of the substrate, the touch electrodes sensing a touch, a connection line connected to a touch electrode of the plurality of touch electrodes, and a pad connected to one end of the connection line. The pad includes a first pad, a second pad on the first pad within a boundary line of the first pad, and a third pad covering a top surface and a side surface of the second pad.
-
公开(公告)号:US09543336B2
公开(公告)日:2017-01-10
申请号:US14963769
申请日:2015-12-09
Applicant: Samsung Display Co., Ltd.
Inventor: Masataka Kano , Ji Hun Lim , Yeon Keon Moon , Jun Hyung Lim , So Young Koo , Myoung Hwa Kim
IPC: H01L27/14 , H01L29/04 , H01L29/15 , H01L31/036 , H01L27/12 , H01L29/417 , H01L29/423 , H01L29/786 , H01L29/66 , H01L29/788
CPC classification number: H01L27/1248 , H01L27/124 , H01L27/1259 , H01L29/41733 , H01L29/42384 , H01L29/4908 , H01L29/66742 , H01L29/66969 , H01L29/78606 , H01L29/78648 , H01L29/7869 , H01L29/788
Abstract: A thin-film transistor array panel includes a substrate, a first gate electrode disposed on the substrate, a first self-assembled monolayer disposed on the first gate electrode, a gate insulating layer disposed on the first self-assembled monolayer, a semiconductor disposed on the gate insulating layer, a drain electrode overlapping the semiconductor, the drain electrode being separated from and facing a source electrode with respect to the semiconductor, a first interlayer insulating layer disposed on the source electrode and the drain electrode, a second self-assembled monolayer disposed on the first interlayer insulating layer, a second gate electrode disposed on the second self-assembled monolayer, a second interlayer insulating layer disposed on the second gate electrode, and a pixel electrode disposed on the second interlayer insulating layer and connected to the drain electrode.
Abstract translation: 薄膜晶体管阵列面板包括基板,设置在基板上的第一栅极电极,设置在第一栅电极上的第一自组装单层,设置在第一自组装单层上的栅极绝缘层,设置在第一自组装单层上的半导体 所述栅极绝缘层,与所述半导体重叠的漏电极,所述漏电极相对于所述半导体分离并面对源电极,设置在所述源电极和所述漏电极上的第一层间绝缘层,第二自组装单层 设置在第一层间绝缘层上的第二栅电极,设置在第二自组装单层上的第二栅电极,设置在第二栅电极上的第二层间绝缘层,以及设置在第二层间绝缘层上并连接到漏极的像素电极 。
-
-
-