公开(公告)号：US09379673B2

公开(公告)日：2016-06-28

申请号：US14292330

申请日：2014-05-30

Applicant: QUALCOMM Incorporated

Inventor： Chuan Wang ,  Dongling Pan ,  Yiwu Tang ,  Klaas van Zalinge ,  Muhammad Hassan

IPC: H03F1/22 ,  H03F1/32 ,  H03F3/19 ,  H03F1/26 ,  H04L25/03 ,  H03F3/193 ,  H03F3/24

CPC classification number: H03F1/32 ,  H03F1/223 ,  H03F1/26 ,  H03F1/3205 ,  H03F3/19 ,  H03F3/193 ,  H03F3/245 ,  H03F2200/111 ,  H03F2200/165 ,  H03F2200/171 ,  H03F2200/294 ,  H03F2200/405 ,  H03F2200/408 ,  H03F2200/411 ,  H03F2200/451 ,  H03F2201/3215 ,  H04L25/03006

Abstract: A device includes a main two-stage low noise amplifier (LNA) configured to amplify a carrier aggregation (CA) communication signal, the main two-stage LNA comprising a first LNA stage and a second LNA stage, an output of the first LNA stage having a first stage second order intermodulation product, the second LNA stage comprising a phase-inverter configured to phase-invert the output of the first LNA stage to generate a second stage phase-inverted output, and an auxiliary LNA stage coupled to the main two-stage LNA, the auxiliary LNA stage configured to cancel the first stage second order intermodulation product.

Abstract translation: 一种装置包括被配置为放大载波聚合（CA）通信信号的主要两级低噪声放大器（LNA），所述主要两级LNA包括第一LNA级和第二LNA级，所述第一LNA级的输出 具有第一级二阶互调产物，所述第二LNA级包括被配置为相位反转所述第一LNA级的输出以产生第二级相位反相输出的相位反相器，以及耦合到所述主二极管的辅助LNA级 级LNA，辅助LNA级配置为取消第一级二阶互调产物。

公开(公告)号：US20150333941A1

公开(公告)日：2015-11-19

申请号：US14671939

申请日：2015-03-27

Applicant: QUALCOMM Incorporated

Inventor： Dongling Pan ,  Aleksandar Miodrag Tasic ,  Rajagopalan Rangarajan ,  Lai Kan Leung ,  Chiewcharn Narathong ,  Yiwu Tang

IPC: H04L27/06 ,  H04B7/26 ,  H04B1/10

CPC classification number: H04L27/063 ,  H04B1/005 ,  H04B1/10 ,  H04B7/26

Abstract: A radio frequency (RF) front end having multiple low noise amplifiers modules is disclosed. In an exemplary embodiment, an apparatus includes at least one first stage amplifier configured to amplify received carrier signals to generate at least one first stage carrier group. Each first stage carrier group includes a respective portion of the carrier signals. The apparatus also includes second stage amplifiers configured to amplify the first stage carrier groups. Each second stage amplifier configured to amplify a respective first stage carrier group to generate two second stage output signals that may be output to different demodulation stages where each demodulation stage demodulates a selected carrier signal.

Abstract translation: 公开了具有多个低噪声放大器模块的射频（RF）前端。 在示例性实施例中，装置包括至少一个第一级放大器，其配置成放大接收的载波信号以产生至少一个第一级载波组。 每个第一级载波组包括载波信号的相应部分。 该装置还包括配置成放大第一级载波组的第二级放大器。 每个第二级放大器被配置为放大相应的第一级载波组以产生两个第二级输出信号，其可以被输出到不同的解调级，其中每个解调级解调所选择的载波信号。

公开(公告)号：US20140266479A1

公开(公告)日：2014-09-18

申请号：US13836932

申请日：2013-03-15

Applicant: QUALCOMM INCORPORATED

Inventor： Sujiang Rong ,  Li Liu ,  Yiwu Tang

IPC: H03B5/12 ,  H03B5/02

CPC classification number: H03B5/1228 ,  H03B5/02 ,  H03B5/1215 ,  H03B5/1296 ,  H03B2200/0082 ,  H03B2200/009

Abstract: A method, an apparatus, and a computer program product are provided. The apparatus provides a VCO signal. The apparatus is a VCO. The apparatus includes a first transconductance circuit. The apparatus further includes a second transconductance circuit coupled with the first transconductance circuit. The second transconductance circuit has a first configuration/mode (e.g., CMOS configuration/mode) and a second configuration/mode (e.g., NMOS configuration/mode or PMOS configuration/mode). The second transconductance circuit is configured to couple an input of the second transconductance circuit to the first transconductance circuit in the first configuration/mode. The second transconductance circuit is configured to isolate the input of the second transconductance circuit from the first transconductance circuit in the second configuration/mode. The second transconductance circuit may include a first transistor and a second transistor, and the input may be a gate of each of the first transistor and the second transistor.

Abstract translation: 提供了一种方法，装置和计算机程序产品。 该装置提供VCO信号。 该装置是VCO。 该装置包括第一跨导电路。 该装置还包括与第一跨导电路耦合的第二跨导电路。 第二跨导电路具有第一配置/模式（例如，CMOS配置/模式）和第二配置/模式（例如，NMOS配置/模式或PMOS配置/模式）。 第二跨导电路被配置为在第一配置/模式中将第二跨导电路的输入耦合到第一跨导电路。 第二跨导电路被配置为在第二配置/模式中将第二跨导电路的输入与第一跨导电路隔离。 第二跨导电路可以包括第一晶体管和第二晶体管，并且输入可以是第一晶体管和第二晶体管中的每一个的栅极。

公开(公告)号：US20140266471A1

公开(公告)日：2014-09-18

申请号：US13837463

申请日：2013-03-15

Applicant: QUALCOMM INCORPORATED

Inventor： Yunliang Zhu ,  Yiwu Tang

IPC: H03L7/00

CPC classification number: H03L7/00 ,  H03B19/14 ,  H03B27/00 ,  H03K3/0315 ,  H03K3/0322 ,  H03L7/18 ,  H03L7/24 ,  H04B1/40

Abstract: A method, an apparatus, and a computer program product are provided. The apparatus generates LO signals. The apparatus includes a LO generator module and an injection signal generator module coupled together. The LO generator module has a plurality of LO outputs and a plurality of injection signal inputs. The LO module is configured to generate the LO signals on the LO outputs based on injection signals received on the injection signal inputs. The injection signal generator module has a plurality of LO inputs and a plurality of injection signal outputs. The LO inputs are coupled to the LO outputs. The injection signal outputs are coupled to the injection signal inputs. The injection signal generator module is configured to generate injection signals on the injection signal outputs based on the LO signals received on the LO inputs and based on a received VCO signal.

Abstract translation: 提供了一种方法，装置和计算机程序产品。 该装置产生LO信号。 该装置包括耦合在一起的LO发生器模块和注入信号发生器模块。 LO发生器模块具有多个LO输出和多个注入信号输入。 LO模块被配置为基于在注入信号输入端接收到的注入信号，在LO输出端产生LO信号。 注入信号发生器模块具有多个LO输入和多个注入信号输出。 LO输入耦合到LO输出。 注入信号输出耦合到注入信号输入端。 注入信号发生器模块被配置为基于在LO输入上接收的LO信号并且基于接收的VCO信号，在喷射信号输出上产生喷射信号。

公开(公告)号：US20140218124A1

公开(公告)日：2014-08-07

申请号：US13757666

申请日：2013-02-01

Applicant: QUALCOMM INCORPORATED

Inventor： Yiwu Tang ,  Jianyun Hu ,  Chiewcharn Narathong

IPC: H03L7/16

CPC classification number: H03L7/16 ,  H03B5/1215 ,  H03B5/1243 ,  H03B5/1256 ,  H03B5/1296 ,  H03B2201/0208 ,  H03B2201/0216 ,  H03C3/0925 ,  H03C3/0941 ,  H03C3/0958 ,  H03L7/00 ,  H03L7/07 ,  H03L7/101 ,  H03L7/104 ,  H03L7/187

Abstract: An apparatus for generating an oscillating output signal includes an inductive-capacitive (LC) circuit and a current tuning circuit. The LC circuit includes a primary inductor and a varactor coupled to the primary inductor. A capacitance of the varactor is responsive to a voltage at a control input of the varactor. The current tuning circuit includes a secondary inductor and a current driving circuit coupled to the secondary inductor. The current driving circuit is responsive to a current at a control input of the current driving circuit. An effective inductance of the primary inductor is adjustable via magnetic coupling to the secondary inductor, and a frequency of the oscillating output signal is responsive to the effective inductance of the primary inductor and to the capacitance of the varactor.

Abstract translation: 用于产生振荡输出信号的装置包括电感 - 电容（LC）电路和电流调谐电路。 LC电路包括耦合到初级电感器的初级电感器和变容二极管。 变容二极管的电容响应于变容二极管的控制输入端的电压。 当前调谐电路包括二次电感器和耦合到次级电感器的电流驱动电路。 电流驱动电路响应于电流驱动电路的控制输入处的电流。 初级电感器的有效电感可通过与次级电感器的磁耦合进行调节，振荡输出信号的频率响应于初级电感器的有效电感和变容二极管的电容。

公开(公告)号：US11632230B2

公开(公告)日：2023-04-18

申请号：US17340953

申请日：2021-06-07

Applicant: QUALCOMM Incorporated

Inventor： Alvin Siu-Chi Li ,  Tomas O'Sullivan ,  Jianjun Yu ,  Yiwu Tang

IPC: H04L7/033 ,  H03L7/08 ,  H03L7/085 ,  H03K5/131

Abstract: An aspect relates to an apparatus including an input buffer including an input configured to receive an input voltage; a ramp voltage generator including an input coupled to an output of the input buffer; an evaluation circuit including an input coupled to an output of the ramp voltage generator, wherein the evaluation circuit includes a first resistor coupled in series with first field effect transistor (FET) between a first voltage rail and a second voltage rail; and an output buffer including an input coupled to a drain of the first FET and an output configured to generate an output voltage.

公开(公告)号：US11387833B1

公开(公告)日：2022-07-12

申请号：US17466901

申请日：2021-09-03

Applicant: QUALCOMM Incorporated

Inventor： Alvin Siu-Chi Li ,  Yue Chao ,  Dongmin Park ,  Heui In Yoon ,  Tomas O'Sullivan ,  Jianjun Yu ,  Yiwu Tang

IPC: H03L7/089 ,  G04F10/00 ,  H04L7/033

Abstract: A method of quantization noise cancellation in a phase-locked loop (PLL) is provided according to certain aspects. The PLL includes a phase detector having a first input configured to receive a reference signal and a second input configured to receive a feedback signal. The method includes delaying the reference signal by a first time delay, delaying the feedback signal by a second time delay, receiving a delta-sigma modulator (DSM) error signal, and adjusting the first time delay and the second time delay in opposite directions based on the DSM error signal.

公开(公告)号：US10250314B2

公开(公告)日：2019-04-02

申请号：US15638215

申请日：2017-06-29

Applicant: QUALCOMM Incorporated

Inventor： Lai Kan Leung ,  Chiewcharn Narathong ,  Rajagopalan Rangarajan ,  Dongling Pan ,  Yiwu Tang ,  Aleksandar Miodrag Tasic

IPC: H04B1/16 ,  H04B7/08 ,  H04L27/152 ,  H04B1/00

Abstract: Certain aspects of the present disclosure provide multi-way diversity receivers with multiple synthesizers. Such a multi-way diversity receiver may be implemented in a carrier aggregation (CA) transceiver. One example wireless reception diversity circuit generally includes three or more receive paths for processing received signals and two or more frequency synthesizing circuits configured to generate local oscillating signals to downconvert the received signals. Each of the frequency synthesizing circuits is shared by at most two of the receive paths, and each pair of the frequency synthesizing circuits may generate a pair of local oscillating signals having the same frequency.

公开(公告)号：US20180013600A1

公开(公告)日：2018-01-11

申请号：US15715006

申请日：2017-09-25

Applicant: QUALCOMM Incorporated

Inventor： Aleksandar Miodrag Tasic ,  Chiewcharn Narathong ,  Christian Holenstein ,  Dongling Pan ,  Yiwu Tang ,  Rajagopalan Rangarajan ,  Lai Kan Leung

IPC: H04L27/26 ,  H04L12/761 ,  H04B1/00 ,  H03F3/24 ,  H03F3/193 ,  H04L12/709 ,  H03F1/22

CPC classification number: H04L27/2653 ,  H03F1/223 ,  H03F3/193 ,  H03F3/245 ,  H04B1/0064 ,  H04L5/001 ,  H04L27/2647 ,  H04L45/16 ,  H04L45/245

Abstract: An apparatus includes a low noise amplifier (LNA) multiplexer configured to receive a plurality of radio frequency (RF) signals at a plurality of input terminals and to combine the plurality of RF signals into a combined RF signal that is output at an output terminal. The LNA multiplexer includes a plurality of input signal paths, and each input signal path is coupleable to a respective input terminal of the plurality of input terminals and is configured to receive a respective RF signal of the plurality of RF signals. The apparatus further includes an LNA demultiplexer configured to receive the combined RF signal at an input port coupled to the output terminal and to distribute the combined RF signal to a plurality of output ports, each output port of the plurality of output ports configured to output the combined RF signal to a respective downconverter of a plurality of downconverters.

公开(公告)号：US09819307B2

公开(公告)日：2017-11-14

申请号：US14745033

申请日：2015-06-19

Applicant: QUALCOMM Incorporated

Inventor： Mohammad Farazian ,  Masoud Moslehi Bajestan ,  Yiwu Tang ,  Jong Min Park ,  Sujiang Rong

IPC: H03B5/12 ,  H03L7/099

CPC classification number: H03B5/124 ,  H03B5/1212 ,  H03B5/1215 ,  H03B5/1256 ,  H03B5/1296 ,  H03B2200/0072 ,  H03L7/099

Abstract: A dual-band voltage controlled oscillator (VCO) includes: a first oscillator circuit including a first inductor; a second oscillator circuit including a second inductor; a first mode switch configured to electrically connect or disconnect a first output terminal of the first oscillator circuit and a first output terminal of the second oscillator circuit; a second mode switch configured to electrically connect or disconnect a second output terminal of the first oscillator circuit and a second output terminal of the second oscillator circuit; a third mode switch configured to electrically connect or disconnect a first terminal of the first inductor and a first terminal of the second inductor; and a fourth mode switch configured to electrically connect or disconnect a second terminal of the first inductor and a second terminal of the second inductor.