公开(公告)号：US10256315B2

公开(公告)日：2019-04-09

申请号：US15320332

申请日：2016-03-07

Applicant: Boe Technology Group Co., Ltd.

Inventor： Chunsheng Jiang ,  Xuyuan Li ,  Wei Liu ,  Xiaming Zhu

IPC: H01L27/12 ,  H01L29/423 ,  H01L29/786 ,  H01L29/49 ,  H01L29/45

Abstract: A thin film transistor, a method for fabricating the same, an array substrate, and a display device are provided. The thin film transistor comprises a copper gate, a gate insulating layer, an active layer, a source, and a drain. The thin film transistor further comprises a copper alloy layer which is arranged on a side of the gate facing the active layer.

公开(公告)号：US09837477B2

公开(公告)日：2017-12-05

申请号：US15122172

申请日：2015-09-25

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiangbo Chen ,  Jun Cheng ,  Chunsheng Jiang ,  Xiaodi Liu ,  Xiangyong Kong

IPC: H01L27/32 ,  H01L21/77 ,  H01L51/56

CPC classification number: H01L27/3262 ,  H01L21/77 ,  H01L27/1288 ,  H01L51/56 ,  H01L2227/323

Abstract: Embodiments of the invention provide an array substrate and a method of manufacturing the same. The method comprises: forming a gate electrode pattern, a gate insulation layer, an active layer pattern and an etching stopping layer on a substrate; forming a photoresist layer on the etching stopping layer; performing a single patterning process on the photoresist layer, such that photoresist in the first region is partially etched off, photoresist in the second region is completely etched off, and photoresist in the third region is completely remained; and performing a single etching process, such that residual photoresist in the first region and a portion of the etching stopping layer in the first region are etched off, and at the same time, a portion of the etching stopping layer and a portion of the gate insulation layer in the second region are etched off.

公开(公告)号：US09825175B2

公开(公告)日：2017-11-21

申请号：US14905068

申请日：2015-08-14

Applicant: BOE Technology Group Co., Ltd.

Inventor： Wei Liu ,  Chunsheng Jiang ,  Lung Pao Hsin

IPC: H01L29/10 ,  H01L29/786 ,  H01L21/44 ,  H01L21/4763 ,  H01L29/45 ,  H01L29/66

CPC classification number: H01L29/78618 ,  H01L21/44 ,  H01L21/47635 ,  H01L29/45 ,  H01L29/458 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/7869

Abstract: A thin film transistor and a fabrication method thereof, an array substrate and a display device are provided. The thin film transistor includes: an active layer, a source-drain metal layer and a diffusion blocking layer located between the active layer and the source-drain metal layer, wherein, the source-drain metal layer includes a source electrode and a drain electrode; the diffusion blocking layer includes a source blocking part corresponding to a position of the source electrode and a drain blocking part corresponding to a position of the drain electrode; and the diffusion blocking layer is doped with different concentrations of nitrogen from a side close to the source-drain metal layer to a side close to the active layer.

公开(公告)号：US09698166B2

公开(公告)日：2017-07-04

申请号：US14424721

申请日：2014-04-16

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunsheng Jiang ,  Wei Liu

IPC: H01L29/786 ,  H01L21/027 ,  H01L21/265 ,  H01L27/12 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L27/1225 ,  H01L27/127 ,  H01L29/66969 ,  H01L29/7869

Abstract: The present disclosure relates to the field of display technology, and provides a TFT, a method for manufacturing the TFT, an array substrate, a method for manufacturing the array substrate, and a display device. The method for manufacturing the TFT includes a step of forming a pattern including a source electrode, a drain electrode and an active layer by a single patterning process, wherein the source electrode, the drain electrode and the active layer are arranged at an identical layer, and the active layer is arranged between the source electrode and the drain electrode.

公开(公告)号：US09659975B2

公开(公告)日：2017-05-23

申请号：US14436576

申请日：2014-09-15

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Meili Wang ,  Fengjuan Liu ,  Chunsheng Jiang

IPC: H01L21/44 ,  H01L27/12 ,  G02F1/1343

CPC classification number: H01L27/1244 ,  G02F1/13439 ,  G02F2001/134372 ,  H01L27/1259

Abstract: Fabrication methods of a transparent conductive electrode (301) and an array substrate are provided. The fabrication method of the transparent conductive electrode (301) comprises: forming a sacrificial layer pattern (201) on a substrate (10) having a first region (A1) and a second region (A2) adjacent to each other, wherein the sacrificial layer pattern (201) is located in the second region (A2), and has an upper sharp corner profile formed on a side adjacent to the first region (A1); forming a transparent conductive thin-film (30) in the first region (A1) and the second region (A2) of the substrate (10) with the sacrificial layer pattern (201) formed thereon, wherein a thickness ratio of the transparent conductive thin-film (30) to the sacrificial layer pattern (201) is less than or equal to 1:1.5, and the transparent conductive thin-film (30) is disconnected at the upper sharp corner profile of the sacrificial layer pattern (201), such that at least a part of a side surface of the sacrificial layer pattern (201) facing the first region (A1) is exposed; and removing the sacrificial layer pattern (201) so as to reserve the transparent conductive thin-film (30) in the first region as the transparent conductive electrode (301).

公开(公告)号：US20160365361A1

公开(公告)日：2016-12-15

申请号：US15120736

申请日：2015-09-08

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunsheng Jiang

IPC: H01L27/12 ,  H01L29/66 ,  H01L21/426 ,  H01L29/786 ,  H01L21/02

CPC classification number: H01L27/127 ,  H01L21/02178 ,  H01L21/02321 ,  H01L21/02612 ,  H01L21/426 ,  H01L21/77 ,  H01L27/12 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1288 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor, a pixel structure, an array substrate, a display device, a method for manufacturing a thin film transistor, and a method for manufacturing a pixel structure are disclosed. The thin film transistor includes a gate electrode, a source electrode and a drain electrode, wherein a first passivation layer made from an aluminum oxide material is provided on the source electrode and the drain electrode, and an active layer made from an aluminum oxide material doped with ions is provided in a region of the first passivation layer corresponding to the gate electrode. Since the first passivation layer as insulation material is doped with the ions to form an active layer, the etching stop layer may be omitted, thereby simplifying the structure of the thin film transistor.

Abstract translation: 公开了薄膜晶体管，像素结构，阵列基板，显示装置，薄膜​​晶体管的制造方法以及像素结构的制造方法。 薄膜晶体管包括栅电极，源电极和漏电极，其中由氧化铝材料制成的第一钝化层设置在源电极和漏电极上，以及由氧化铝材料掺杂的有源层 其中离子被提供在对应于栅电极的第一钝化层的区域中。 由于作为绝缘材料的第一钝化层掺杂有离子以形成有源层，因此可以省略蚀刻停止层，从而简化了薄膜晶体管的结构。

公开(公告)号：US09494837B2

公开(公告)日：2016-11-15

申请号：US14366525

申请日：2013-04-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shi Shu ,  Guanbao Hui ,  Teng Ye ,  Chunsheng Jiang ,  Cuili Gai

IPC: H01L27/12 ,  G02F1/1368 ,  G02F1/1362 ,  H01L29/786

CPC classification number: G02F1/1368 ,  G02F1/1362 ,  G02F1/136209 ,  G02F1/136227 ,  G02F2001/136222 ,  H01L27/124 ,  H01L27/1259 ,  H01L27/1288 ,  H01L29/78633

Abstract: Embodiments of the disclosure provide a manufacturing method of a TFT array substrate, a TFT array substrate and a display device. The method comprises steps of: S1. forming a thin film transistor on a base substrate; S2. forming a passivation layer thin film on the base substrate after the step S1; S3. forming a passivation layer via hole and a light-shielding pattern on the base substrate after the step S2; and S4. forming a color filter layer and a pixel electrode on the base substrate after the step S3. The pixel electrode is electrically connected to a drain electrode of the thin film transistor through the passivation layer via hole, and the color filter layer is in correspondence with a position of the pixel electrode.

Abstract translation: 本发明的实施例提供了TFT阵列基板，TFT阵列基板和显示装置的制造方法。 该方法包括以下步骤：S1。 在基底基板上形成薄膜晶体管; S2。 在步骤S1之后在基底基板上形成钝化层薄膜; S3。 在步骤S2之后在基底基板上形成钝化层通孔和遮光图案; 和S4。 在步骤S3之后在基底基板上形成滤色器层和像素电极。 像素电极通过钝化层通孔电连接到薄膜晶体管的漏电极，滤色器层与像素电极的位置对应。

公开(公告)号：US20160260788A1

公开(公告)日：2016-09-08

申请号：US14435895

申请日：2014-08-13

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jingfei Fang ,  Chunsheng Jiang ,  Yanzhao Li

IPC: H01L27/32 ,  H01L51/56

CPC classification number: H01L27/3248 ,  H01L27/1288 ,  H01L27/322 ,  H01L27/3258 ,  H01L51/5206 ,  H01L51/56 ,  H01L2227/323

Abstract: The present invention discloses a WOLED back panel and a method of manufacturing the same. The method comprises: forming a pattern of a color filter layer on a substrate; exposing the pattern of the color filter layer by halftone exposure so as to form a groove structure in the pattern of the color filter layer; forming a pattern of a resin material layer on a surface of the substrate formed with the groove structure, and heavily doping a partial region of the resin material layer so as to form a heavily doped part having a conductivity; the heavily doped partial region of the resin material layer corresponding to a pixel electrode region, a via region, and a connection region between the pixel electrode region and the via region; and forming an organic light-emitting layer and a cathode in order on a surface of the substrate after heavily doping the partial region of the resin material layer. The production cost is reduced in the present invention by forming a groove structure in the color filter layer instead of manufacturing a conventional pixel defining layer.

Abstract translation: 本发明公开了一种WOLED背面板及其制造方法。 该方法包括：在衬底上形成滤色器层的图案; 通过半色调曝光曝光滤色器层的图案，以便在滤色器层的图案中形成凹槽结构; 在形成有槽结构的基板的表面上形成树脂材料层的图案，并且重掺杂树脂材料层的部分区域，以形成具有导电性的重掺杂部分; 对应于像素电极区域，通孔区域和像素电极区域和通孔区域之间的连接区域的树脂材料层的重掺杂部分区域; 以及在重掺杂树脂材料层的部分区域之后，在衬底的表面上依次形成有机发光层和阴极。 通过在滤色器层中形成凹槽结构而不是制造常规的像素限定层，在本发明中降低了生产成本。

公开(公告)号：US09397223B2

公开(公告)日：2016-07-19

申请号：US14347124

申请日：2013-12-13

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunsheng Jiang ,  Jingfei Fang

IPC: H01L29/786 ,  H01L29/66 ,  H01L21/02 ,  H01L27/12

CPC classification number: H01L29/7869 ,  H01L21/02178 ,  H01L21/02244 ,  H01L21/02565 ,  H01L27/1225 ,  H01L29/66969

Abstract: Embodiments of the invention provide a thin film transistor, a method of manufacturing the same, an array substrate comprising the thin film transistor and a display device. The method of manufacturing the thin film transistor comprises steps of forming a gate electrode (220), a gate insulating layer (230), an oxide active layer (240), a source electrode (260) and a drain electrode (270) on a substrate (210). After forming the oxide active layer (240), the method further comprises a step of forming an etch barrier layer (250) of a metal oxide on the oxide active layer (240).

Abstract translation: 本发明的实施例提供一种薄膜晶体管，其制造方法，包括薄膜晶体管的阵列基板和显示装置。 制造薄膜晶体管的方法包括以下步骤：在栅极电极（220），栅极绝缘层（230），氧化物活性层（240），源极（260）和漏极（270）上形成 衬底（210）。 在形成氧化物活性层（240）之后，该方法还包括在氧化物活性层（240）上形成金属氧化物的蚀刻阻挡层（250）的步骤。

公开(公告)号：US09268169B2

公开(公告)日：2016-02-23

申请号：US14077684

申请日：2013-11-12

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chunsheng Jiang

IPC: G03F7/20 ,  G02F1/1335 ,  G03F7/00 ,  H05B33/10

CPC classification number: G02F1/133516 ,  G03F7/0007 ,  H05B33/10

Abstract: Embodiments of the invention provide a display panel with a pixel define layer, a manufacturing method of a pixel define layer of a display panel, and a display device. The display panel with the pixel define layer comprises: a substrate and the pixel define layer disposed on the substrate. The pixel define layer includes a photosensitive resin layer and a transparent define layer sequentially disposed on the substrate. The photosensitive resin layer has an opening in a region corresponding to each pixel region of the display panel, the transparent define layer has an opening in the region corresponding to each pixel region of the display panel, and the opening of the transparent define layer is smaller than the opening of the photosensitive resin layer so as to form a fill region with a wide lower portion and a narrow upper portion.

Abstract translation: 本发明的实施例提供具有像素限定层的显示面板，显示面板的像素限定层的制造方法以及显示装置。 具有像素限定层的显示面板包括：衬底和设置在衬底上的像素限定层。 像素限定层包括依次设置在基板上的光敏树脂层和透明限定层。 感光性树脂层在与显示面板的每个像素区域对应的区域中具有开口，透明限定层在对应于显示面板的每个像素区域的区域中具有开口，并且透明限定层的开口较小 比形成感光性树脂层的开口部形成宽的下部和狭窄的上部的填充区域。