Abstract:
Grounding terminals of a memory unit are disposed at the opposite ends of an array of signal terminals of the memory unit, respectively, reception grounding terminals of a connector are disposed at the opposite ends of any array of reception signal terminals of the connector, respectively, the grounding terminals of the memory unit are connected to the reception grounding terminals of the connector, respectively, before the signal terminals of the memory unit are connected to the reception signal terminals of the connector in inserting the memory unit in the connector. Upon the insertion of the memory unit in the connector, the static electricity accumulate in the memory unit is discharged surely to a ground without affecting the semiconductor memory of the memory unit through the signal terminals and the reception signal terminals.
Abstract:
Cartridges for a microcomputer have two adjacent edge connectors replaced by a single connector with a projection which passes into the area in which the adjacent connector would normally be placed. When the cartridge is inserted or removed from the connector socket in the microcomputer the projection transiently contacts the associated socket contact. A fixed potential (for example earth potential) normally applied to the main portion of the edge connector from its associated socket contact is therefore transferred to the transiently contacted socket contact to provide a reset signal for the microprocessor of the microcomputer. Thus, the microprocessor is reset each time a cartridge is inserted or withdrawn.
Abstract:
A printed circuit board or the like for electrical apparatus has edge connectors for insertion into a terminal or group of terminals for communication of electrical signals from the terminals to the board and vice versa. Some contacts on the board edge are recessed slightly from the edge so that certain electrical connections may be made prior to others.
Abstract:
An electronic isolation device is formed on a monolithic substrate and includes a plurality of passive isolation components. The isolation components are formed in three metal levels. The first metal level is separated from the monolithic substrate by an inorganic PMD layer. The second metal level is separated from the first metal level by a layer of silicon dioxide. The third metal level is separated from the second metal level by at least 20 microns of polyimide or PBO. The isolation components include bondpads on the third metal level for connections to other devices. A dielectric layer is formed over the third metal level, exposing the bondpads. The isolation device contains no transistors.
Abstract:
An electronic isolation device is formed on a monolithic substrate and includes a plurality of passive isolation components. The isolation components are formed in three metal levels. The first metal level is separated from the monolithic substrate by an inorganic PMD layer. The second metal level is separated from the first metal level by a layer of silicon dioxide. The third metal level is separated from the second metal level by at least 20 microns of polyimide or PBO. The isolation components include bondpads on the third metal level for connections to other devices. A dielectric layer is formed over the third metal level, exposing the bondpads. The isolation device contains no transistors.
Abstract:
An electronic isolation device is formed on a monolithic substrate and includes a plurality of passive isolation components. The isolation components are formed in three metal levels. The first metal level is separated from the monolithic substrate by an inorganic PMD layer. The second metal level is separated from the first metal level by a layer of silicon dioxide. The third metal level is separated from the second metal level by at least 20 microns of polyimide or PBO. The isolation components include bondpads on the third metal level for connections to other devices. A dielectric layer is formed over the third metal level, exposing the bondpads. The isolation device contains no transistors.
Abstract:
A memory card includes a substrate and a resin-molded layer. The substrate includes contact pads that are on a second face thereof for communication with a card reader. Semiconductor chips are on a first face of the substrate and electrically connected to the contact pads through bonding wires and circuit wiring. The resin-molded layer is on the first face and covers the chips.
Abstract:
A memory card includes a substrate and a resin-molded layer. The substrate includes contact pads that are on a second face thereof for communication with a card reader. Semiconductor chips are on a first face of the substrate and electrically connected to the contact pads through bonding wires and circuit wiring. The resin-molded layer is on the first face and covers the chips. The fabrication process for the memory cards begins with fabrication of a multi-substrate that includes several unit substrates. At least one semiconductor chip is provided on each unit substrate and electrically connected. A continuous resin-molded layer is then formed to extend over the unit substrates. Separating the unit substrates of the multi-substrate divides the continuous resin-molded layer into individual resin-molded units and provides the memory cards.
Abstract:
A personal computer (PC) card insertion method and apparatus uses a subset of connector ground terminals and pins, located at either end of the connector, for detecting the onset of a card insertion. The host PC card slot connector has pull-up resistors for keeping the subset of ground terminals at a high logic level (V.sub.CC). Also, the subset of pins are made longer than the signal pins so that when an insertion of a PC card begins, the grounding of one or more of the subset of pins indicates that a PC card insertion has begun, allowing the host system to take the necessary precautions to ensure an orderly acceptance of the card without any undesirable system affects that might otherwise result. Also, a logic network for using the subset of connector terminals as additional grounding connections is provided upon completion of the insertion.
Abstract:
Apparatus is disclosed for use when a first connector is to be mated to a second connector that includes shorting contacts and is being supplied with a plurality of active signals such that the breaking of the electrical connection between the shorting contacts themselves is substantially delayed until the time of making of the electrical connection between the shorting contacts and at least one corresponding conductive terminal of the first connector. Such a delay permits electrical separation of the shorting contacts only at the instant when at least one of the shorting contacts will begin to contact its corresponding conductive terminal without substantially impairing any other characteristics of the connector. This delay is established by employing a first connector which reduces or eliminates altogether any insulating material that passes between the shorting contacts as the first connector is inserted into the second connector prior to the shorting contacts establishing electrical conductivity with at least one of their corresponding conductors.