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公开(公告)号：US10465287B2
公开(公告)日：2019-11-05
申请号：US15919191
申请日：2018-03-12
Inventor： Chih-Chien Liu , Pin-Hong Chen , Tsun-Min Cheng , Yi-Wei Chen
IPC: C23C16/455 , H01L21/768 , H01L23/544 , H01L21/285 , H01L21/321 , C23C16/02 , C23C16/34
Abstract: A semiconductor device includes a substrate, a dielectric layer, a first tungsten layer, an interface layer and a second tungsten layer. The dielectric layer is disposed on the substrate and has a first opening and a second opening larger than the first opening. The first tungsten layer is filled in the first opening and is disposed in the second opening. The second tungsten layer is disposed on the first tungsten layer in the second opening, wherein the second tungsten layer has a grain size gradually increased from a bottom surface to a top surface. The interface layer is disposed between the first tungsten layer and the second tungsten layer, wherein the interface layer comprises a nitrogen containing layer. The present invention further includes a method of forming a semiconductor device.
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公开(公告)号：US10453677B2
公开(公告)日：2019-10-22
申请号：US15644821
申请日：2017-07-09
Inventor： Cheng-Hsu Huang , Jui-Min Lee , Ching-Hsiang Chang , Yi-Wei Chen , Wei-Hsin Liu , Shih-Fang Tzou
IPC: H01L21/02 , H01L21/76 , H01L21/762 , H01L27/108
Abstract: A method of forming an oxide layer includes the following steps. A substrate is provided. A surface of the substrate is treated to form an oxygen ion-rich surface. A spin-on-dielectric layer is formed on the oxygen ion-rich surface of the substrate. The present invention also provides a method of forming an oxide layer including the following steps. A substrate is provided. A surface of the substrate is treated with a hydrogen peroxide (H2O2) solution or a surface of the substrate is treated with oxygen containing gas, to form an oxygen ion-rich surface. A spin-on-dielectric layer is formed on the oxygen ion-rich surface of the substrate.
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公开(公告)号：US10446559B2
公开(公告)日：2019-10-15
申请号：US16053748
申请日：2018-08-02
Inventor： Tzu-Chin Wu , Chao-An Liu , Ching-Hsiang Chang , Yi-Wei Chen
IPC: H01L27/108 , H01L21/308 , H01L21/02 , H01L21/306 , H01L21/033 , H01L21/027
Abstract: A method of fabricating a DRAM includes providing a substrate. Later, a first mask layer is formed to cover the substrate. The first mask layer includes a hydrogen-containing silicon nitride layer and a silicon oxide layer. The hydrogen-containing silicon nitride layer has the chemical formula: SixNyHz, wherein x is between 4 and 8, y is between 3.5 and 9.5, and z equals 1. After that, the first mask layer is patterned to form a first patterned mask layer. Next, the substrate is etched by taking the first patterned mask layer as a mask to form a word line trench. Subsequently, the first patterned mask layer is removed entirely. Finally, a word line is formed in the word line trench.
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公开(公告)号：US10418251B2
公开(公告)日：2019-09-17
申请号：US15688885
申请日：2017-08-29
Applicant: UNITED MICROELECTRONICS CORP.
Inventor： Wen-Jiun Shen , Ssu-I Fu , Yen-Liang Wu , Chia-Jong Liu , Yu-Hsiang Hung , Chung-Fu Chang , Man-Ling Lu , Yi-Wei Chen
IPC: H01L21/8232 , H01L21/308 , H01L27/088 , H01L21/8234 , H01L21/306 , H01L29/66 , H01L21/02
Abstract: A fin-shaped structure includes a substrate having a first fin-shaped structure located in a first area and a second fin-shaped structure located in a second area, wherein the second fin-shaped structure includes a ladder-shaped cross-sectional profile part. The present invention also provides two methods of forming this fin-shaped structure. In one case, a substrate having a first fin-shaped structure and a second fin-shaped structure is provided. A treatment process is performed to modify an external surface of the top of the second fin-shaped structure, thereby forming a modified part. A removing process is performed to remove the modified part through a high removing selectivity to the first fin-shaped structure and the second fin-shaped structure, and the modified part, thereby the second fin-shaped structure having a ladder-shaped cross-sectional profile part is formed.
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公开(公告)号：US10374051B1
公开(公告)日：2019-08-06
申请号：US15987891
申请日：2018-05-23
Inventor： Ji-Min Lin , Yi-Wei Chen , Tsun-Min Cheng , Pin-Hong Chen , Chih-Chien Liu , Chun-Chieh Chiu , Tzu-Chieh Chen , Chih-Chieh Tsai , Yi-An Huang , Kai-Jiun Chang
IPC: H01L29/49 , H01L29/423 , H01L21/28 , H01L21/8234 , H01L29/43
Abstract: A method for fabricating semiconductor device includes the steps of: forming a silicon layer on a substrate; forming a metal silicon nitride layer on the silicon layer; forming a stress layer on the metal silicon nitride layer; performing a thermal treatment process; removing the stress layer; forming a conductive layer on the metal silicon nitride layer; and patterning the conductive layer, the metal silicon nitride layer, and the silicon layer to form a gate structure.
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Patent Agency Ranking
公开(公告)号：US20190237468A1
公开(公告)日：2019-08-01
申请号：US15901875
申请日：2018-02-21
Inventor： Pin-Hong Chen , Yi-Wei Chen , Chih-Chieh Tsai , Tzu-Chieh Chen , Tsun-Min Cheng , Chi-Mao Hsu
IPC: H01L27/108
Abstract: A fabricating method of a semiconductive element includes providing a substrate, wherein an amorphous silicon layer covers the substrate. Then, a titanium nitride layer is provided to cover and contact the amorphous silicon layer. Later, a titanium layer is formed to cover the titanium nitride layer. Finally, a thermal process is performed to transform the titanium nitride layer into a nitrogen-containing titanium silicide layer.
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公开(公告)号：US20190221571A1
公开(公告)日：2019-07-18
申请号：US15885729
申请日：2018-01-31
Inventor： Wei-Hsin Liu , Cheng-Hsu Huang , Jui-Min Lee , Yi-Wei Chen
IPC: H01L27/108 , H01L23/532 , H01L23/528 , H01L21/3205 , H01L21/768 , H01L21/285
CPC classification number: H01L27/10894 , H01L21/28556 , H01L21/32053 , H01L21/32055 , H01L21/7685 , H01L21/76856 , H01L21/76864 , H01L21/76879 , H01L23/528 , H01L23/53266 , H01L23/53271 , H01L23/5329 , H01L27/10823 , H01L27/10885 , H01L27/10888 , H01L27/10897
Abstract: A semiconductor memory device includes a semiconductor substrate and a patterned conductive structure. The patterned conductive structure is disposed on the semiconductor substrate. The patterned conductive structure includes a first silicon conductive layer, a second silicon conductive layer, an interface layer, a barrier layer, and a metal conductive layer. The second silicon conductive layer is disposed on the first silicon conductive layer. The interface layer is disposed between the first silicon conductive layer and the second silicon conductive layer, and the interface layer includes oxygen. The barrier layer is disposed on the second silicon conductive layer. The metal conductive layer is disposed on the barrier layer.
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公开(公告)号：US10312080B2
公开(公告)日：2019-06-04
申请号：US15859750
申请日：2018-01-02
Inventor： Mei-Ling Chen , Wei-Hsin Liu , Yi-Wei Chen , Ching-Hsiang Chang , Jui-Min Lee , Chia-Lung Chang , Tzu-Chin Wu , Shih-Fang Tzou
IPC: H01L21/02
Abstract: The present invention provides a method for forming an amorphous silicon multiple layer structure, the method comprises the flowing steps: first, a substrate material layer is provided, next, a first amorphous silicon layer is formed on the substrate material layer, wherein the first amorphous silicon layer includes a plurality of hydrogen atoms disposed therein, afterwards, an UV curing process is performed to the first amorphous silicon layer, so as to remove the hydrogen atoms from the first amorphous silicon layer, finally, a second amorphous silicon layer is formed on the first amorphous silicon layer.
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19.发明申请公开(公告)号：US20190067296A1
公开(公告)日：2019-02-28
申请号：US15712151
申请日：2017-09-22
Inventor： Pin-Hong Chen , Yi-Wei Chen , Tzu-Chieh Chen , Chih-Chieh Tsai , Chia-Chen Wu , Kai-Jiun Chang , Yi-An Huang , Tsun-Min Cheng
IPC: H01L27/108
Abstract: A method for fabricating buried word line of a dynamic random access memory (DRAM) includes the steps of: forming a trench in a substrate; forming a first conductive layer in the trench; forming a second conductive layer on the first conductive layer, in which the second conductive layer above the substrate and the second conductive layer below the substrate comprise different thickness; and forming a third conductive layer on the second conductive layer to fill the trench.
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公开(公告)号：US20180366323A1
公开(公告)日：2018-12-20
申请号：US15644821
申请日：2017-07-09
Inventor： Cheng-Hsu Huang , Jui-Min Lee , Ching-Hsiang Chang , Yi-Wei Chen , Wei-Hsin Liu , Shih-Fang Tzou
IPC: H01L21/02 , H01L21/762 , H01L27/108
CPC classification number: H01L21/02282 , H01L21/0206 , H01L21/02307 , H01L21/02312 , H01L21/02323 , H01L21/02337 , H01L21/76229 , H01L21/76237 , H01L27/10814 , H01L27/10823 , H01L27/10876 , H01L27/10885 , H01L27/10888 , H01L27/10891 , H01L27/10894 , H01L27/10897
Abstract: A method of forming an oxide layer includes the following steps. A substrate is provided. A surface of the substrate is treated to form an oxygen ion-rich surface. A spin-on-dielectric layer is formed on the oxygen ion-rich surface of the substrate. The present invention also provides a method of forming an oxide layer including the following steps. A substrate is provided. A surface of the substrate is treated with a hydrogen peroxide (H2O2) solution or a surface of the substrate is treated with oxygen containing gas, to form an oxygen ion-rich surface. A spin-on-dielectric layer is formed on the oxygen ion-rich surface of the substrate.
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