公开(公告)号：US20190051759A1

公开(公告)日：2019-02-14

申请号：US16162505

申请日：2018-10-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kengo AKIMOTO ,  Tatsuya HONDA ,  Norihito SONE

IPC: H01L29/786 ,  H01L21/02 ,  H01L29/66 ,  H01L29/04 ,  H01L27/12 ,  H01L21/477 ,  H01L21/465 ,  H01L21/428

Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

公开(公告)号：US20170309754A1

公开(公告)日：2017-10-26

申请号：US15648943

申请日：2017-07-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Hiroki OHARA ,  Tatsuya HONDA ,  Takatsugu OMATA ,  Yusuke NONAKA ,  Masahiro TAKAHASHI ,  Akiharu MIYANAGA

IPC: H01L29/786 ,  H01L29/24 ,  H01L29/04 ,  H01L29/10

CPC classification number: H01L29/78696 ,  H01L29/045 ,  H01L29/1033 ,  H01L29/247 ,  H01L29/7869 ,  H01L29/78693

Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. The oxide semiconductor film comprises a crystalline region. The oxide semiconductor film has a first peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.4 nm−1 and less than or equal to 0.7 nm−1 in a region where a magnitude of a scattering vector is greater than or equal to 3.3 nm−1 and less than or equal to 4.1 nm−1. The oxide semiconductor film has a second peak of electron diffraction intensity with a full width at half maximum of greater than or equal to 0.45 nm−1 and less than or equal to 1.4 nm−1 in a region where a magnitude of a scattering vector is greater than or equal to 5.5 nm−1 and less than or equal to 7.1 nm−1.

公开(公告)号：US20160005877A1

公开(公告)日：2016-01-07

申请号：US14851119

申请日：2015-09-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Masahiro TAKAHASHI ,  Tatsuya HONDA ,  Takehisa HATANO

IPC: H01L29/786 ,  H01L29/24

CPC classification number: H01L29/7869 ,  H01L29/24 ,  H01L29/78618

Abstract: Provided is a structure of a transistor, which enables a so-called normally-off switching element, and a manufacturing method thereof. Provided is a structure of a semiconductor device which achieves high-speed response and high-speed operation by improving on characteristics of a transistor, and a manufacturing method thereof. Provided is a highly reliable semiconductor device. In the transistor in which a semiconductor layer, source and drain electrode layers, a gate insulating layer, and a gate electrode layer are stacked in that order. As the semiconductor layer, an oxide semiconductor layer which contains at least four kinds of elements of indium, gallium, zinc, and oxygen, and has a composition ratio (atomic percentage) of indium as twice or more as a composition ratio of gallium and a composition ratio of zinc, is used.

公开(公告)号：US20150287837A1

公开(公告)日：2015-10-08

申请号：US14745950

申请日：2015-06-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Tatsuya HONDA

IPC: H01L29/786 ,  H01L29/04

CPC classification number: H01L29/78609 ,  H01L21/02554 ,  H01L21/02565 ,  H01L27/1225 ,  H01L27/14616 ,  H01L29/045 ,  H01L29/66969 ,  H01L29/78621 ,  H01L29/7869 ,  H01L29/78696

Abstract: An object is to provide a structure of a transistor which has a channel formation region formed using an oxide semiconductor and a positive threshold voltage value, which enables a so-called normally-on switching element. The transistor includes an oxide semiconductor stack in which at least a first oxide semiconductor layer and a second oxide semiconductor layer with different energy gaps are stacked and a region containing oxygen in excess of its stoichiometric composition ratio is provided.

Abstract translation: 本发明的目的是提供一种晶体管的结构，其具有使用氧化物半导体形成的沟道形成区域和正的阈值电压值，这使得能够形成所谓的常开开关元件。 晶体管包括氧化物半导体堆叠，其中至少第一氧化物半导体层和具有不同能隙的第二氧化物半导体层被堆叠，并且提供含有超过其化学计量组成比的氧的区域。

公开(公告)号：US20150137121A1

公开(公告)日：2015-05-21

申请号：US14578920

申请日：2014-12-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kosei NODA ,  Shunpei YAMAZAKI ,  Tatsuya HONDA ,  Yusuke SEKINE ,  Hiroyuki TOMATSU

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L29/7869 ,  H01L21/0242 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02595 ,  H01L21/02656 ,  H01L21/84 ,  H01L27/10873 ,  H01L27/1156 ,  H01L27/1203 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78609

Abstract: A highly reliable transistor which includes an oxide semiconductor and has high field-effect mobility and in which a variation in threshold voltage is small is provided. By using the transistor, a high-performance semiconductor device, which has been difficult to realize, is provided. The transistor includes an oxide semiconductor film which contains two or more kinds, preferably three or more kinds of elements selected from indium, tin, zinc, and aluminum. The oxide semiconductor film is formed in a state where a substrate is heated. Further, oxygen is supplied to the oxide semiconductor film with an adjacent insulating film and/or by ion implantation in a manufacturing process of the transistor, so that oxygen deficiency which generates a carrier is reduced as much as possible. In addition, the oxide semiconductor film is highly purified in the manufacturing process of the transistor, so that the concentration of hydrogen is made extremely low.

Abstract translation: 提供了包括氧化物半导体并且具有高场效应迁移率并且其中阈值电压的变化小的高度可靠的晶体管。 通过使用晶体管，提供了难以实现的高性能半导体器件。 晶体管包括含有选自铟，锡，锌和铝中的两种或更多种，优选三种或更多种元素的氧化物半导体膜。 在加热基板的状态下形成氧化物半导体膜。 此外，在晶体管的制造过程中，通过相邻的绝缘膜和/或通过离子注入向氧化物半导体膜提供氧，从而尽可能地减少产生载流子的氧气缺乏。 此外，在晶体管的制造过程中，氧化物半导体膜被高度纯化，使得氢的浓度极低。

公开(公告)号：US20130105865A1

公开(公告)日：2013-05-02

申请号：US13654864

申请日：2012-10-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tatsuya HONDA ,  Masashi TSUBUKU ,  Yusuke NONAKA ,  Takashi SHIMAZU

IPC: H01L29/786

CPC classification number: H01L29/78693 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device includes a base insulating film including silicon, an oxide semiconductor film over the base insulating film, a gate insulating film over the oxide semiconductor film, a gate electrode which is in contact with the gate insulating film and overlaps with at least the oxide semiconductor film, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. The oxide semiconductor film includes a region in which a concentration of silicon distributed from the interface with the base insulating film toward an inside of the oxide semiconductor film is lower than or equal to 1.0 at. %. A crystal portion is included at least in the region.

Abstract translation: 半导体器件包括：基底绝缘膜，包括硅，在基底绝缘膜上的氧化物半导体膜，氧化物半导体膜上的栅极绝缘膜，与栅极绝缘膜接触并与至少氧化物重叠的栅极; 半导体膜，以及与氧化物半导体膜电连接的源电极和漏电极。 氧化物半导体膜包括从与基底绝缘膜的界面朝向氧化物半导体膜的内部分布的硅浓度低于或等于1.0at的区域。 ％。 晶体部分至少包括在该区域中。

公开(公告)号：US20130105791A1

公开(公告)日：2013-05-02

申请号：US13657165

申请日：2012-10-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tatsuya HONDA ,  Masashi TSUBUKU ,  Yusuke NONAKA ,  Takashi SHIMAZU

IPC: H01L29/78

CPC classification number: H01L29/7869 ,  H01L29/045 ,  H01L29/42376 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/78696

Abstract: To suppress a decrease in on-state current in a semiconductor device including an oxide semiconductor. A semiconductor device includes an insulating film containing silicon, an oxide semiconductor film over the insulating film, a gate insulating film containing silicon over the oxide semiconductor film, a gate electrode which is over the gate insulating film and overlaps with at least the oxide semiconductor film, and a source electrode and a drain electrode which are electrically connected to the oxide semiconductor film. In the semiconductor device, the oxide semiconductor film which overlaps with at least the gate electrode includes a region in which a concentration of silicon distributed from an interface with the insulating film is lower than or equal to 1.1 at.%. In addition, a concentration of silicon contained in a remaining portion of the oxide semiconductor film except the region is lower than the concentration of silicon contained in the region.

Abstract translation: 抑制包括氧化物半导体的半导体器件中的导通电流的降低。 半导体器件包括含有硅的绝缘膜，绝缘膜上的氧化物半导体膜，在氧化物半导体膜上含有硅的栅极绝缘膜，位于栅极绝缘膜之上并与至少氧化物半导体膜重叠的栅电极 ，以及与氧化物半导体膜电连接的源电极和漏电极。 在半导体器件中，与至少栅电极重叠的氧化物半导体膜包括从绝缘膜的界面分布的硅的浓度低于或等于1.1at。％的区域。 此外，除了该区域之外，氧化物半导体膜的剩余部分中所含的硅的浓度低于该区域中所含的硅的浓度。

公开(公告)号：US20250169115A1

公开(公告)日：2025-05-22

申请号：US19029124

申请日：2025-01-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tatsuya HONDA ,  Masashi TSUBUKU ,  Yusuke NONAKA ,  Takashi SHIMAZU ,  Shunpei YAMAZAKI

IPC: H10D30/67 ,  G02F1/1333 ,  G02F1/1337 ,  G02F1/1339 ,  G02F1/1343 ,  H01L21/02 ,  H10D62/40 ,  H10D62/80 ,  H10D64/68 ,  H10D86/40 ,  H10D86/60 ,  H10D99/00 ,  H10K59/121

Abstract: A semiconductor device includes a gate electrode, a gate insulating film which includes oxidized material containing silicon and covers the gate electrode, an oxide semiconductor film provided to be in contact with the gate insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the gate insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region. At least the first region includes a crystal portion.

公开(公告)号：US20240250184A1

公开(公告)日：2024-07-25

申请号：US18626594

申请日：2024-04-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tatsuya HONDA ,  Masashi TSUBUKU ,  Yusuke NONAKA ,  Takashi SHIMAZU ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  G02F1/1333 ,  G02F1/1337 ,  G02F1/1339 ,  G02F1/1343 ,  H01L21/02 ,  H01L27/12 ,  H01L29/04 ,  H01L29/24 ,  H01L29/51 ,  H01L29/66 ,  H10K59/121

CPC classification number: H01L29/7869 ,  G02F1/133345 ,  G02F1/1337 ,  G02F1/13394 ,  G02F1/134309 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/24 ,  H01L29/51 ,  H01L29/66969 ,  H01L29/78696 ,  G02F2202/10 ,  H01L21/02565 ,  H10K59/1213

Abstract: A semiconductor device includes a gate electrode, a gate insulating film which includes oxidized material containing silicon and covers the gate electrode, an oxide semiconductor film provided to be in contact with the gate insulating film and overlap with at least the gate electrode, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. In the oxide semiconductor film, a first region which is provided to be in contact with the gate insulating film and have a thickness less than or equal to 5 nm has a silicon concentration lower than or equal to 1.0 at. %, and a region in the oxide semiconductor film other than the first region has lower silicon concentration than the first region. At least the first region includes a crystal portion.

公开(公告)号：US20240072172A1

公开(公告)日：2024-02-29

申请号：US18500380

申请日：2023-11-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Masahiko HAYAKAWA ,  Tatsuya HONDA

IPC: H01L29/786 ,  H01L27/12 ,  H01L27/146 ,  H01L29/24 ,  H01L29/45 ,  H01L29/49 ,  H01L29/66

CPC classification number: H01L29/78606 ,  H01L27/1225 ,  H01L27/14616 ,  H01L29/24 ,  H01L29/45 ,  H01L29/49 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696 ,  H10K59/1213

Abstract: When a semiconductor device including a transistor in which a gate electrode layer, a gate insulating film, and an oxide semiconductor film are stacked and a source and drain electrode layers are provided in contact with the oxide semiconductor film is manufactured, after the formation of the gate electrode layer or the source and drain electrode layers by an etching step, a step of removing a residue remaining by the etching step and existing on a surface of the gate electrode layer or a surface of the oxide semiconductor film and in the vicinity of the surface is performed. The surface density of the residue on the surface of the oxide semiconductor film or the gate electrode layer can be 1×1013 atoms/cm2 or lower.