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11.发明授权公开(公告)号：US10528259B2
公开(公告)日：2020-01-07
申请号：US15681574
申请日：2017-08-21
Applicant: Samsung Electronics Co., Ltd.
Inventor： Youngmin Lee , Ji-Seung Youn , Sungho Seo , Hyuntae Park , Hwaseok Oh , JinHyeok Choi
Abstract: Disclosed is a storage device which includes a nonvolatile memory device and a controller. The controller communicates with a host through a first port, communicates with an external storage device through a second port, and controls the nonvolatile memory device based on first mapping information. The controller is configured to receive second mapping information from the external storage device, receive first write data from the host and to selectively transmit first write data to the external storage device based on the second mapping information.
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公开(公告)号：US10515048B2
公开(公告)日：2019-12-24
申请号：US15647558
申请日：2017-07-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Youngmin Lee , Sungho Seo , Hyuntae Park , Hwaseok Oh
Abstract: A device includes a first input/output (I/O) port for communication with an external processor, a second I/O port for communication with a second device, and an interface adaptor supporting communication through the first and second I/O ports via a protocol having a plurality of layers, including an application layer, a physical layer, and a physical adaptor layer. The application layer processes information according to an application layer format and the physical adaptor layer processes information according to a physical adaptor layer format. The device receives from the external processor through the first I/O port a request in the application layer format that one or more communication conditions be set for a physical layer of the second device, converts the request from the application layer format to the physical adaptor layer format, and sends the converted request in the physical adaptor layer format to the second device through the second I/O port.
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公开(公告)号：US20180096711A1
公开(公告)日：2018-04-05
申请号：US15700257
申请日：2017-09-11
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sungho Seo , Hyuntae Park , Youngmin Lee , Hwaseok Oh , JinHyeok Choi
Abstract: An electronic device may include an embedded storage device connected to directly communicate with an extended storage device, and an application processor connected to directly communicate with the embedded storage device and connected to the extended storage device through the embedded storage device. The embedded storage device includes a monitoring device that monitors commands received from the application processor. The monitoring device generates a command state signal representing a state of the embedded storage device and the extended storage device based on a result of monitoring the commands. The embedded storage device operates so that a power supply is controlled in a part or all of the embedded storage device according to the command state signal.
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14.发明申请公开(公告)号：US20180081595A1
公开(公告)日：2018-03-22
申请号：US15702035
申请日：2017-09-12
Applicant: Samsung Electronics Co., Ltd.
Inventor： Youngmin LEE , Sungho Seo , Hyuntae Park , Hwaseok Oh , JinHyeok Choi
IPC: G06F3/06
CPC classification number: G06F3/0659 , G06F3/0604 , G06F3/0626 , G06F3/0656 , G06F3/0683
Abstract: An electronic device includes an embedded storage device and an application processor. The embedded storage device is connected to directly communicate with a removable storage device which processes a packet having a first characteristic. The embedded storage device processes a packet having a second characteristic. The application processor is connected to directly communicate with the embedded storage device, but not directly connected to the removable storage device. The application processor processes a packet having a third characteristic. The embedded storage device compensates at least one of the first characteristic or the second characteristic, such that at least one of a first packet of the first characteristic received from the removable storage device or a second packet of the second characteristic in the embedded storage device is provided to the application processor according to the third characteristic.
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公开(公告)号：US11934691B2
公开(公告)日：2024-03-19
申请号：US18304782
申请日：2023-04-21
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dongwoo Nam , Sungho Seo , Kwanwoo Noh , Myungsub Shin , Haesung Jung
CPC classification number: G06F3/0655 , G06F3/0604 , G06F3/0679 , G06F13/1668 , G06F13/385 , G06F13/4278
Abstract: A link startup method of a storage device connected to a host through a plurality of lanes includes performing an initialization operation in the storage device; establishing data communication through a connected transmission lane and a connected reception lane among the plurality of lanes; transmitting a high speed link up message to the host through the connected transmission lane of the storage device; and performing a link startup operation in a high speed mode through the connected transmission lane of the storage device and the connected reception lane of the host, based on the high speed link up message transmitted by the storage device.
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Patent Agency Ranking
公开(公告)号：US20230259303A1
公开(公告)日：2023-08-17
申请号：US18304782
申请日：2023-04-21
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dongwoo NAM , Sungho Seo , Kwanwoo Noh , Myungsub Shin , Haesung Jung
CPC classification number: G06F3/0655 , G06F3/0604 , G06F3/0679 , G06F13/1668 , G06F13/385 , G06F13/4278
Abstract: A link startup method of a storage device connected to a host through a plurality of lanes includes performing an initialization operation in the storage device; establishing data communication through a connected transmission lane and a connected reception lane among the plurality of lanes; transmitting a high speed link up message to the host through the connected transmission lane of the storage device; and performing a link startup operation in a high speed mode through the connected transmission lane of the storage device and the connected reception lane of the host, based on the high speed link up message transmitted by the storage device.
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公开(公告)号：US10437498B2
公开(公告)日：2019-10-08
申请号：US15697900
申请日：2017-09-07
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kwanwoo Noh , Hyuntae Park , Sungho Seo , Hwaseok Oh , Youngmin Lee , JinHyeok Choi
Abstract: An electronic device includes an application processor; and a first storage device that is, connected to the application processor and directly communicates with the application processor, and connected to a second storage device such that the second storage device communicates with the application processor through the first storage device, wherein the first storage device includes a reset converter configured to generate a software reset signal in response to a hardware reset signal received from the application processor, and wherein the software reset signal resets the second storage device.
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公开(公告)号：US10296261B2
公开(公告)日：2019-05-21
申请号：US15702035
申请日：2017-09-12
Applicant: Samsung Electronics Co., Ltd.
Inventor： Youngmin Lee , Sungho Seo , Hyuntae Park , Hwaseok Oh , JinHyeok Choi
IPC: G06F3/06
Abstract: An electronic device includes an embedded storage device and an application processor. The embedded storage device is connected to directly communicate with a removable storage device which processes a packet having a first characteristic. The embedded storage device processes a packet having a second characteristic. The application processor is connected to directly communicate with the embedded storage device, but not directly connected to the removable storage device. The application processor processes a packet having a third characteristic. The embedded storage device compensates at least one of the first characteristic or the second characteristic, such that at least one of a first packet of the first characteristic received from the removable storage device or a second packet of the second characteristic in the embedded storage device is provided to the application processor according to the third characteristic.
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公开(公告)号：US12130655B2
公开(公告)日：2024-10-29
申请号：US18508479
申请日：2023-11-14
Applicant: Samsung Electronics Co., Ltd.
Inventor： Kwanwoo Noh , Sungho Seo , Yongwoo Jeong , Dongwoo Nam , Myungsub Shin , Hyunkyu Jang
CPC classification number: G06F1/08 , G06F1/04 , G06F3/0632 , G06F3/0658 , G06F3/0679 , G06F13/4291 , G11C7/22 , G11C16/32 , H04L7/0004 , H04L7/0008
Abstract: A storage device and a storage system including the same are provided. The storage device includes a reference clock pin configured to receive a reference clock signal from a host, a reference clock frequency determination circuitry configured to determine a reference clock frequency from the reference clock signal received through the reference clock pin, and a device controller circuitry configured to perform a high speed mode link startup between the host and the storage device according to the reference clock frequency.
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公开(公告)号：US12038857B2
公开(公告)日：2024-07-16
申请号：US18446670
申请日：2023-08-09
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jeongsu Kim , Kwanwoo Noh , Sungho Seo , Yongwoo Jeong
CPC classification number: G06F13/1668 , G06F1/12 , G06F13/4027 , H04L1/0002 , H04L7/0008
Abstract: A method of operating a storage device includes receiving a first bit sequence including a request for changing a data rate from a host according to a first data rate through an input signal pin; sending a second bit sequence including a response to the request for changing a data rate to the host at the first data rate through an output signal pin; and changing the data rate to a second data rate according to whether a tail-of-burst (TOB) indicating an end of the second bit sequence is output.
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